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SN74LVTH240APWR PDF预览

SN74LVTH240APWR

更新时间: 2024-11-09 15:52:23
品牌 Logo 应用领域
德州仪器 - TI 驱动信息通信管理光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
23页 1136K
描述
LVT SERIES, DUAL 4-BIT DRIVER, INVERTED OUTPUT, PDSO20, TSSOP-20

SN74LVTH240APWR 技术参数

生命周期:Obsolete零件包装代码:TSSOP
包装说明:TSSOP, TSSOP20,.25针数:20
Reach Compliance Code:unknown风险等级:5.15
系列:LVTJESD-30 代码:R-PDSO-G20
长度:6.5 mm逻辑集成电路类型:BUS DRIVER
位数:4功能数量:2
端口数量:2端子数量:20
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:INVERTED
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP20,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH传播延迟(tpd):4.6 ns
认证状态:Not Qualified座面最大高度:1.2 mm
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2.7 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:BICMOS温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL宽度:4.4 mm
Base Number Matches:1

SN74LVTH240APWR 数据手册

 浏览型号SN74LVTH240APWR的Datasheet PDF文件第2页浏览型号SN74LVTH240APWR的Datasheet PDF文件第3页浏览型号SN74LVTH240APWR的Datasheet PDF文件第4页浏览型号SN74LVTH240APWR的Datasheet PDF文件第5页浏览型号SN74LVTH240APWR的Datasheet PDF文件第6页浏览型号SN74LVTH240APWR的Datasheet PDF文件第7页 
SN54LVTH240, SN74LVTH240  
3.3-V ABT OCTAL BUFFERS/DRIVERS  
WITH 3-STATE OUTPUTS  
SCBS679K − DECEMBER 1996 − REVISED SEPTEMBER 2003  
D
D
D
D
Support Mixed-Mode Signal Operation (5-V  
Input and Output Voltages With 3.3-V V  
D
Bus Hold on Data Inputs Eliminates the  
Need for External Pullup/Pulldown  
Resistors  
)
CC  
Support Unregulated Battery Operation  
Down to 2.7 V  
D
D
Latch-Up Performance Exceeds 500 mA Per  
JESD 17  
Typical V  
(Output Ground Bounce)  
OLP  
<0.8 V at V = 3.3 V, T = 25°C  
ESD Protection Exceeds JESD 22  
− 2000-V Human-Body Model (A114-A)  
− 200-V Machine Model (A115-A)  
CC  
A
I
off  
and Power-Up 3-State Support Hot  
Insertion  
SN54LVTH240 . . . FK PACKAGE  
(TOP VIEW)  
SN54LVTH240 . . . J OR W PACKAGE  
SN74LVTH240 . . . DB, DW, NS,  
OR PW PACKAGE  
SN74LVTH240 . . . RGY PACKAGE  
(TOP VIEW)  
(TOP VIEW)  
1
20  
3
2
1 20 19  
18  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
1OE  
1A1  
2Y4  
1A2  
2Y3  
1A3  
2Y2  
1A4  
2Y1  
GND  
VCC  
2OE  
1Y1  
2A4  
1Y2  
2A3  
1Y3  
2A2  
1Y4  
2A1  
1Y1  
17 2A4  
1A2  
2Y3  
1A3  
2Y2  
1A4  
4
5
6
7
8
19  
18  
17  
16  
15  
14  
13  
12  
2
3
4
5
6
7
8
9
1A1  
2Y4  
1A2  
2Y3  
1A3  
2Y2  
1A4  
2Y1  
2OE  
1Y1  
2A4  
1Y2  
2A3  
1Y3  
2A2  
1Y4  
16  
15  
14  
1Y2  
2A3  
1Y3  
9 10 11 12 13  
10  
11  
description/ordering information  
These octal buffers and line drivers are designed specifically for low-voltage (3.3-V) V operation, but with the  
CC  
capability to provide a TTL interface to a 5-V system environment.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
T
A
PACKAGE  
QFN − RGY  
SOIC − DW  
Tape and reel SN74LVTH240RGYR  
LXH240  
Tube  
SN74LVTH240DW  
LVTH240  
Tape and reel SN74LVTH240DWR  
Tape and reel SN74LVTH240NSR  
Tape and reel SN74LVTH240DBR  
SOP − NS  
LVTH240  
LXH240  
SSOP − DB  
−40°C to 85°C  
Tube  
SN74LVTH240PW  
TSSOP − PW  
LXH240  
LXH240  
Tape and reel SN74LVTH240PWR  
SN74LVTH240GQNR  
Tape and reel  
VFBGA − GQN  
VFBGA − ZQN (Pb-free)  
CDIP − J  
SN74LVTH240ZQNR  
Tube  
Tube  
Tube  
SNJ54LVTH240J  
SNJ54LVTH240W  
SNJ54LVTH240FK  
SNJ54LVTH240J  
SNJ54LVTH240W  
SNJ54LVTH240FK  
CFP − W  
−55°C to 125°C  
LCCC − FK  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright © 2003, Texas Instruments Incorporated  
On products compliant to MIL-PRF-38535, all parameters are tested  
unless otherwise noted. On all other products, production  
processing does not necessarily include testing of all parameters.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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