5秒后页面跳转
捷配首页

Datasheet > 暂无类别数据> SN74LVC652APWR
SN74LVC652APWR PDF预览

SN74LVC652APWR

更新时间： 2024-11-17 13:13:51
品牌 Logo 应用领域
德州仪器 - TI 总线收发器输出元件
页数 文件大小 规格书
13页 198K
描述
暂无描述

阅读下载

中文翻译

获取价格

SN74LVC652APWR 数据手册

 浏览型号SN74LVC652APWR的Datasheet PDF文件第2页浏览型号SN74LVC652APWR的Datasheet PDF文件第3页浏览型号SN74LVC652APWR的Datasheet PDF文件第4页浏览型号SN74LVC652APWR的Datasheet PDF文件第5页浏览型号SN74LVC652APWR的Datasheet PDF文件第6页浏览型号SN74LVC652APWR的Datasheet PDF文件第7页 
SN54LVC652A, SN74LVC652A  
OCTAL BUS TRANSCEIVERS AND REGISTERS  
WITH 3-STATE OUTPUTS  
SCAS303H – JANUARY 1993 – REVISED AUGUST 1998  
SN74LVC652A . . . DB, DW, OR PW PACKAGE  
(TOP VIEW)  
EPIC (Enhanced-Performance Implanted  
CMOS) Submicron Process  
Typical V  
< 0.8 V at V  
(Output Ground Bounce)  
OLP  
CLKAB  
SAB  
OEAB  
A1  
V
CC  
1
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
= 3.3 V, T = 25°C  
CC  
A
CLKBA  
SBA  
OEBA  
B1  
2
Typical V  
> 2 V at V  
(Output V  
Undershoot)  
3
OHV  
OH  
= 3.3 V, T = 25°C  
4
CC  
A
A2  
5
Support Mixed-Mode Signal Operation on  
All Ports (5-V Input/Output Voltage With  
A3  
B2  
6
A4  
B3  
3.3-V V  
)
7
CC  
A5  
B4  
8
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
A6  
B5  
9
A7  
B6  
10  
11  
A8  
B7  
Package Options Include Plastic  
GND 12  
13 B8  
Small-Outline (DW), Shrink Small-Outline  
(DB), Thin Shrink Small-Outline (PW)  
Packages, and Ceramic Chip Carriers (FK)  
SN54LVC652A . . . FK PACKAGE  
(TOP VIEW)  
description  
The SN54LVC652A octal bus transceiver and  
register is designed for 2.7-V to 3.6-V V  
CC  
operation, and the SN74LVC652A octal bus  
transceiver and register is designed for 1.65-V to  
4
3
2
1
28 27 26  
25  
5
6
7
8
9
A1  
A2  
A2  
NC  
A4  
OEBA  
B1  
B2  
NC  
B3  
B4  
24  
23  
22  
21  
20  
19  
3.6-V V  
operation.  
CC  
These devices consist of bus transceiver circuits,  
D-type flip-flops, and control circuitry arranged for  
multiplexed transmission of data directly from the  
data bus or from the internal storage registers.  
A5 10  
A6 11  
B5  
12 13 14 15 16 17 18  
Output-enable (OEAB and OEBA) inputs are  
provided to control the transceiver functions.  
Select-control (SAB and SBA) inputs are provided  
to select whether real-time or stored data is  
transferred. The circuitry used for select control  
eliminates the typical decoding glitch that occurs  
NC – No internal connection  
in a multiplexer during the transition between stored and real-time data. A low input selects real-time data, and  
a high input selects stored data. Figure 1 illustrates the four fundamental bus-management functions that are  
performed with the ’LVC652A.  
Data on the A or B data bus, or both, is stored in the internal D-type flip-flops by low-to-high transitions at the  
appropriate clock (CLKAB or CLKBA) inputs, regardless of the select- or enable-control pins. When SAB and  
SBA are in the real-time transfer mode, it is possible to store data without using the internal D-type flip-flops by  
simultaneously enabling OEAB and OEBA. In this configuration, each output reinforces its input. When all other  
data sources to the two sets of bus lines are at high impedance, each set of bus lines remains at its last state.  
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators  
in a mixed 3.3-V/5-V system environment.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC is a trademark of Texas Instruments Incorporated.  
Copyright 1998, Texas Instruments Incorporated  
On products compliant to MIL-PRF-38535, all parameters are tested  
unless otherwise noted. On all other products, production  
processing does not necessarily include testing of all parameters.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...13

中文翻译

下载PDF

SN74LVC652APWR 替代型号

型号 品牌 替代类型 描述 数据表
SN74LVC652ADW TI

完全替代

 OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SN74LVC646APW TI

完全替代

 OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SN74LVC646ADW TI

完全替代

 OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS

与SN74LVC652APWR相关器件

型号 品牌 获取价格 描述 数据表
SN74LVC652APWRE4 TI

获取价格

 		LVC/LCX/Z SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24, GREEN, PLASTIC, TSSOP
SN74LVC652APWT TI

获取价格

 		Octal Bus Transceiver And Register With 3-State Outputs 24-TSSOP -40 to 85
SN74LVC652APWTG4 TI

获取价格

 		Octal Bus Transceiver And Register With 3-State Outputs 24-TSSOP -40 to 85
SN74LVC652DB TI

获取价格

 		LVC/LCX/Z SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24
SN74LVC652DBLE TI

获取价格

 		暂无描述
SN74LVC652DBLE ROCHESTER

获取价格

 		LVC/LCX/Z SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24
SN74LVC652DW ROCHESTER

获取价格

 		LVC/LCX/Z SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24
SN74LVC652DW TI

获取价格

 		Octal Bus Transceiver And Register With 3-State Outputs 24-SOIC -40 to 85
SN74LVC652DWR TI

获取价格

 		暂无描述
SN74LVC652PW TI

获取价格

 		IC LVC/LCX/Z SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24, Bus Driver/Transce

与SN74LVC652APWR相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证