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SN74LVC161284 PDF预览

SN74LVC161284

更新时间： 2024-02-16 09:00:05
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
8页 112K
描述
19-BIT BUS INTERFACE

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SN74LVC161284 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：SSOP
包装说明：SSOP,针数：48
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.33
Is Samacsys：N其他特性：CONTAINS 5 DRIVERS, 4 RECEIVERS AND EIGHT BI-DIRECTIONAL LINES
差分输出：NO驱动器位数：8
输入特性：SCHMITT TRIGGER接口集成电路类型：LINE TRANSCEIVER
接口标准：IEEE 1284JESD-30 代码：R-PDSO-G48
JESD-609代码：e4长度：15.88 mm
湿度敏感等级：1位数：19
功能数量：1端子数量：48
最高工作温度：70 °C最低工作温度：
输出特性：3-STATE最大输出低电流：0.084 A
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：SSOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, SHRINK PITCH峰值回流温度（摄氏度）：260
认证状态：Not Qualified最大接收延迟：40 ns
接收器位数：8座面最大高度：2.79 mm
最大压摆率：45 mA最大供电电压：3.6 V
最小供电电压：3 V标称供电电压：3.3 V
电源电压1-最大：5.5 V电源电压1-分钟：3 V
电源电压1-Nom：5 V表面贴装：YES
技术：CMOS温度等级：COMMERCIAL
端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)端子形式：GULL WING
端子节距：0.635 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED最大传输延迟：40 ns
宽度：7.5 mmBase Number Matches：1

SN74LVC161284 数据手册

 浏览型号SN74LVC161284的Datasheet PDF文件第2页浏览型号SN74LVC161284的Datasheet PDF文件第3页浏览型号SN74LVC161284的Datasheet PDF文件第4页浏览型号SN74LVC161284的Datasheet PDF文件第5页浏览型号SN74LVC161284的Datasheet PDF文件第6页浏览型号SN74LVC161284的Datasheet PDF文件第7页 
SN74LVC161284  
19-BIT BUS INTERFACE  
SCAS583I – NOVEMBER 1996 – REVISED MARCH 1999  
DGG OR DL PACKAGE  
(TOP VIEW)  
1.4-kΩ Pullup Resistors Integrated on All  
Open-Drain Outputs Eliminate the Need for  
Discrete Resistors  
HD  
A9  
1
48 DIR  
47 Y9  
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
2
A10  
A11  
A12  
A13  
3
46 Y10  
45 Y11  
4
Designed for the IEEE Std 1284-I (Level 1  
Type) and IEEE Std 1284-II (Level 2 Type)  
Electrical Specifications  
5
44  
Y12  
6
43 Y13  
7
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
V
V
B1  
B2  
GND  
B3  
B4  
B5  
B6  
GND  
B7  
CABLE  
CC  
CC  
A1  
Flow-Through Architecture Optimizes PCB  
Layout  
8
9
A2  
GND  
A3  
Package Options Include Plastic 300-mil  
Shrink Small-Outline (DL) and Thin-Shrink  
Small-Outline (DGG) Packages  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
A4  
A5  
A6  
description  
GND  
A7  
The SN74LVC161284 is designed for 3-V to 3.6-V  
operation. This device provides  
V
CC  
A8  
B8  
V
asynchronous two-way communication between  
data buses. The control-function implementation  
minimizes external timing requirements.  
V
CABLE  
CC  
CC  
PERI LOGIC IN  
PERI LOGIC OUT  
C14  
C15  
C16  
A14  
A15  
A16  
A17  
This device has eight bidirectional bits; data can  
flow in the A-to-B direction when DIR is high, and  
in the B-to-A direction when DIR is low. This  
device also has five drivers, which drive the cable  
side, and four receivers. The SN74LVC161284  
has one receiver dedicated to the HOST LOGIC  
line and a driver to drive the PERI LOGIC line.  
C17  
HOST LOGIC OUT  
HOST LOGIC IN  
The output drive mode is determined by the high-drive (HD) control pin. When HD is high, the outputs are in  
a totem-pole configuration, and in an open-drain configuration when HD is low. This meets the drive  
requirements as specified in the IEEE Std 1284-I (level 1 type) and IEEE Std 1284-II (level 2 type) parallel  
peripheral-interface specifications. Except for HOST LOGIC IN and PERI LOGIC OUT, all cable-side pins have  
a 1.4-kΩ integrated pullup resistor. The pullup resistor is switched off if the associated output driver is in the low  
state or if the output voltage is above V  
CABLE. If V  
CABLE is off, PERI LOGIC OUT is set to low.  
CC  
CC  
The device has two supply voltages. V isdesignedfor3-Vto3.6-Voperation. V CABLEsuppliestheinputs  
CC  
CC  
and output buffers of the cable side only and is designed for 3-V to 3.6-V and for 4.7-V to 5.5-V operation. Even  
when V CABLE is 3 V to 3.6 V, the cable-side I/O pins are 5-V tolerant.  
CC  
The SN74LVC161284 is characterized for operation from 0°C to 70°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 1999, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
12345678

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