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SN74LV574DBR PDF预览

SN74LV574DBR

更新时间： 2024-11-16 02:58:43
品牌 Logo 应用领域
德州仪器 - TI 驱动光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
7页 136K
描述
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS

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中文翻译

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SN74LV574DBR 技术参数

是否无铅： 含铅生命周期：Obsolete
零件包装代码：SSOP包装说明：SSOP,
针数：20Reach Compliance Code：unknown
HTS代码：8542.39.00.01风险等级：5.73
其他特性：BROADSIDE VERSION OF 374; TYP VOLP < 0.8V AT VCC = 3.3V, TA = 25 DEGREE C系列：LV/LV-A/LVX/H
JESD-30 代码：R-PDSO-G20长度：7.2 mm
逻辑集成电路类型：BUS DRIVER位数：8
功能数量：1端口数量：2
端子数量：20最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：SSOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, SHRINK PITCH传播延迟（tpd）：26 ns
认证状态：Not Qualified座面最大高度：2 mm
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：2.7 V
标称供电电压 (Vsup)：3.3 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子形式：GULL WING端子节距：0.65 mm
端子位置：DUAL宽度：5.3 mm

SN74LV574DBR 数据手册

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SN54LV574, SN74LV574  
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS  
WITH 3-STATE OUTPUTS  
SCLS199B – MARCH 1993 – REVISED APRIL 1996  
SN54LV574 . . . J OR W PACKAGE  
SN74LV574 . . . DB, DW, OR PW PACKAGE  
(TOP VIEW)  
EPIC (Enhanced-Performance Implanted  
CMOS) 2-µ Process  
Typical V  
< 0.8 V at V , T = 25°C  
(Output Ground Bounce)  
OLP  
CC  
A
OE  
1D  
2D  
3D  
4D  
5D  
6D  
7D  
8D  
V
CC  
1Q  
2Q  
1
2
3
4
5
6
7
8
9
20  
19  
18  
Typical V  
> 2 V at V , T = 25°C  
(Output V  
Undershoot)  
OHV  
CC  
OH  
A
17 3Q  
16 4Q  
15 5Q  
14 6Q  
13 7Q  
12 8Q  
11 CLK  
ESD Protection Exceeds 2000 V Per  
MIL-STD-883C, Method 3015; Exceeds  
200 V Using Machine Model  
(C = 200 pF, R = 0)  
Latch-Up Performance Exceeds 250 mA  
Per JEDEC Standard JESD-17  
GND 10  
Package Options Include Plastic  
Small-Outline (DW), Shrink Small-Outline  
(DB), Thin Shrink Small-Outline (PW),  
Ceramic Flat (W) Packages, Chip Carriers  
(FK), and (J) 300-mil DIPs  
SN54LV574 . . . FK PACKAGE  
(TOP VIEW)  
description  
3
2
1
20 19  
18  
2Q  
3Q  
4Q  
3D  
4D  
5D  
6D  
7D  
4
5
6
7
8
These octal edge-triggered D-type flip-flops are  
designed for 2.7-V to 5.5-V V operation.  
17  
16  
CC  
15 5Q  
14  
9 10 11 12 13  
The ’LV574 feature 3-state outputs designed  
specifically for driving highly capacitive or  
relatively low-impedance loads. This device is  
particularly suitable for implementing buffer  
registers, I/O ports, bidirectional bus drivers, and  
working registers.  
6Q  
On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data  
(D) inputs.  
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high  
or low logic levels) or high-impedance state. In the high-impedance state, the outputs neither load nor drive the  
bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines  
without need for interface or pullup components.  
OE does not affect the internal operations of the flip-flops. Old data can be retained or new data can be entered  
while the outputs are in the high-impedance state.  
The SN74LV574 is available in TI’s shrink small-outline package (DB), which provides the same I/O pin count  
and functionality of standard small-outline packages in less than half the printed-circuit-board area.  
The SN54LV574 is characterized for operation over the full military temperature range of –55°C to 125°C. The  
SN74LV574 is characterized for operation from –40°C to 85°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC is a trademark of Texas Instruments Incorporated.  
Copyright 1996, Texas Instruments Incorporated  
UNLESS OTHERWISE NOTED this document contains PRODUCTION  
DATA information current as of publication date. Products conform to  
specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all  
parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567

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与SN74LV574DBR相关器件

型号 品牌 获取价格 描述 数据表
SN74LV574DW TI

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 		OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
SN74LV574DWR TI

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 		Octal Edge-Triggered D-Type Flip-Flop With 3-State Outputs 20-SOIC -40 to 85
SN74LV574PW TI

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 		OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
SN74LV574PWLE TI

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 		Octal Edge-Triggered D-Type Flip-Flop With 3-State Outputs 20-TSSOP -40 to 85
SN74LV574PWR TI

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 		Octal Edge-Triggered D-Type Flip-Flop With 3-State Outputs 20-TSSOP -40 to 85
SN74LV594A TI

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 		8-BIT SHIFT REGISTERS WITH OUTPUT REGISTERS
SN74LV594ABQBR TI

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 		具有输出寄存器的 8 位移位寄存器 | BQB | 16 | -40 to 125
SN74LV594AD TI

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 		8-BIT SHIFT REGISTERS WITH OUTPUT REGISTERS
SN74LV594ADB TI

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 		8-BIT SHIFT REGISTERS WITH OUTPUT REGISTERS
SN74LV594ADBE4 TI

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 		LV/LV-A/LVX/H SERIES, 8-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO

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