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SN74LV594ADR PDF预览

SN74LV594ADR

更新时间: 2024-11-15 05:17:03
品牌 Logo 应用领域
德州仪器 - TI 移位寄存器输出元件
页数 文件大小 规格书
20页 437K
描述
8-BIT SHIFT REGISTERS WITH OUTPUT REGISTERS

SN74LV594ADR 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOIC
包装说明:SOP, SOP16,.25针数:16
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:6 weeks
风险等级:0.94其他特性:PARALLEL OUTPUT IS REGISTERED
计数方向:RIGHT系列:LV/LV-A/LVX/H
JESD-30 代码:R-PDSO-G16JESD-609代码:e4
长度:9.9 mm负载电容(CL):50 pF
逻辑集成电路类型:SERIAL IN PARALLEL OUT最大频率@ Nom-Sup:50000000 Hz
最大I(ol):0.05 A湿度敏感等级:1
位数:8功能数量:1
端子数量:16最高工作温度:125 °C
最低工作温度:-40 °C输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP16,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TR
峰值回流温度(摄氏度):260电源:3.3 V
最大电源电流(ICC):0.02 mA传播延迟(tpd):18.6 ns
认证状态:Not Qualified施密特触发器:No
座面最大高度:1.75 mm子类别:Shift Registers
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):2.5 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED触发器类型:POSITIVE EDGE
宽度:3.91 mm最小 fmax:115 MHz
Base Number Matches:1

SN74LV594ADR 数据手册

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ꢊ ꢋꢌꢍ ꢎ ꢀꢏꢍ ꢐ ꢎ ꢑꢒ ꢓ ꢍꢀ ꢎꢒ ꢑ ꢀ  
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SCLS413I − APRIL 1998 − REVISED APRIL 2005  
SN54LV594A . . . J OR W PACKAGE  
SN74LV594A . . . D, DB, NS, OR PW PACKAGE  
(TOP VIEW)  
D
D
D
2-V to 5.5-V V  
Operation  
CC  
Max t of 6.5 ns at 5 V  
pd  
Typical V  
<0.8 V at V  
(Output Ground Bounce)  
OLP  
CC  
Q
Q
V
CC  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
= 3.3 V, T = 25°C  
B
A
Q
C
D
A
D
D
D
D
D
D
D
Typical V  
>2.3 V at V  
(Output V  
Undershoot)  
OHV  
CC  
OH  
Q
SER  
= 3.3 V, T = 25°C  
A
Q
RCLR  
E
Support Mixed-Mode Voltage Operation  
on All Ports  
Q
12 RCLK  
F
11  
10  
9
Q
SRCLK  
SRCLR  
G
8-Bit Serial-In, Parallel-Out Shift  
Registers With Storage  
Q
H
GND  
Q
H′  
Independent Direct Overriding Clears  
on Shift and Storage Registers  
SN54LV594A . . . FK PACKAGE  
(TOP VIEW)  
Independent Clocks for Shift and  
Storage Registers  
Latch-Up Performance Exceeds 100 mA  
Per JESD 78, Class II  
3
2
1
20 19  
18  
SER  
RCLR  
NC  
Q
4
5
6
7
8
D
ESD Protection Exceeds JESD 22  
− 2000-V Human-Body Model (A114-A)  
− 200-V Machine Model (A115-A)  
Q
17  
16  
E
NC  
15 RCLK  
14  
9 10 11 12 13  
Q
F
− 1000-V Charged-Device Model (C101)  
SRCLK  
Q
G
description/ordering information  
The ’LV594A devices are 8-bit shift registers  
designed for 2-V to 5.5-V V  
operation.  
CC  
NC − No internal connection  
These devices contain an 8-bit serial-in,  
parallel-out shift register that feeds an 8-bit D-type  
storage register. Separate clocks (RCLK, SRCLK) and direct overriding clear (RCLR, SRCLR) inputs are  
provided on the shift and storage registers. A serial output (Q ) is provided for cascading purposes.  
H′  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
Tube of 40  
Reel of 2500  
Reel of 2000  
Reel of 2000  
Tube of 90  
Reel of 2000  
Reel of 250  
Tube of 25  
Tube of 150  
Tube of 55  
SN74LV594AD  
SOIC − D  
LV594A  
SN74LV594ADR  
SN74LV594ANSR  
SN74LV594ADBR  
SN74LV594APW  
SN74LV594APWR  
SN74LV594APWT  
SNJ54LV594AJ  
SNJ54LV594AW  
SNJ54LV594AFK  
SOP − NS  
74LV594A  
LV594A  
SSOP − DB  
−40°C to 85°C  
TSSOP − PW  
LV594A  
CDIP − J  
CFP − W  
LCCC − FK  
SNJ54LV594AJ  
SNJ54LV594AW  
SNJ54LV594AFK  
−55°C to 125°C  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design  
guidelines are available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2005, Texas Instruments Incorporated  
ꢖ ꢁ ꢄꢒꢀꢀ ꢕ ꢎꢏ ꢒꢑꢔ ꢍꢀ ꢒ ꢁ ꢕꢎꢒꢘ ꢙꢚ ꢛꢜ ꢝꢞꢟ ꢠꢡꢢ ꢣꢙ ꢟꢞ ꢣꢙꢤ ꢛꢣꢜ ꢗꢑ ꢕ ꢘ ꢖ ꢥꢎ ꢍꢕ ꢁ  
ꢨꢤ ꢧ ꢤ ꢡ ꢢ ꢙ ꢢ ꢧ ꢜ ꢫ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

SN74LV594ADR 替代型号

型号 品牌 替代类型 描述 数据表
SN74LV594ADRG4 TI

完全替代

8-BIT SHIFT REGISTERS WITH OUTPUT REGISTERS
SN74LV594ADG4 TI

完全替代

8-BIT SHIFT REGISTERS WITH OUTPUT REGISTERS
SN74LV594ADE4 TI

完全替代

8-BIT SHIFT REGISTERS WITH OUTPUT REGISTERS

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