Datasheet > SN74LV573PWR

SN74LV573PWR

更新时间： 2024-11-15 21:06:31

品牌	Logo	应用领域
德州仪器 - TI		驱动光电二极管逻辑集成电路
页数	文件大小	规格书
8页	151K
描述
Octal Transparent D-type Latch With 3-State Outputs 20-TSSOP -40 to 85

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SN74LV573PWR 技术参数

是否无铅：	含铅	生命周期：	Obsolete
零件包装代码：	TSSOP	包装说明：	TSSOP, TSSOP20,.25
针数：	20	Reach Compliance Code：	unknown
HTS代码：	8542.39.00.01	风险等级：	5.77
其他特性：	BROADSIDE VERSION OF 373; TYP VOLP < 0.8V AT VCC = 3.3V, TA = 25 DEGREE C	系列：	LV/LV-A/LVX/H
JESD-30 代码：	R-PDSO-G20	长度：	6.5 mm
逻辑集成电路类型：	BUS DRIVER	位数：	8
功能数量：	1	端口数量：	2
端子数量：	20	最高工作温度：	85 °C
最低工作温度：	-40 °C	输出特性：	3-STATE
输出极性：	TRUE	封装主体材料：	PLASTIC/EPOXY
封装代码：	TSSOP	封装等效代码：	TSSOP20,.25
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
传播延迟（tpd）：	31 ns	认证状态：	Not Qualified
座面最大高度：	1.2 mm	最大供电电压 (Vsup)：	5.5 V
最小供电电压 (Vsup)：	2.7 V	标称供电电压 (Vsup)：	3.3 V
表面贴装：	YES	技术：	CMOS
温度等级：	INDUSTRIAL	端子形式：	GULL WING
端子节距：	0.65 mm	端子位置：	DUAL
宽度：	4.4 mm	Base Number Matches：	1

SN74LV573PWR 数据手册

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SCLS198B − FEBRUARY 1993 − REVISED APRIL 1996

SN54LV573 . . . J OR W PACKAGE

SN74LV573 . . . DB, DW, OR PW PACKAGE

(TOP VIEW)

EPIC  (Enhanced-Performance Implanted

CMOS) 2-µ Process

Typical V

(Output Ground Bounce)

OLP

< 0.8 V at V , T = 25°C

Typical V

(Output V

Undershoot)

OHV

> 2 V at V , T = 25°C

17 3Q

16 4Q

15 5Q

14 6Q

13 7Q

12 8Q

11 LE

ESD Protection Exceeds 2000 V Per

MIL-STD-883C, Method 3015; Exceeds

200 V Using Machine Model

(C = 200 pF, R = 0)

Latch-Up Performance Exceeds 250 mA

Per JEDEC Standard JESD-17

GND 10

Package Options Include Plastic

Small-Outline (DW), Shrink Small-Outline

(DB), Thin Shrink Small-Outline (PW),

Ceramic Flat (W) Packages, Chip Carriers

(FK), and (J) 300-mil DIPs

SN54LV573 . . . FK PACKAGE

(TOP VIEW)

description

20 19

These octal transparent D-type latches are

designed for 2.7-V to 5.5-V V operation.

15 5Q

9 10 11 12 13

The ’LV573 feature 3-state outputs designed

specifically for driving highly capacitive or

relatively low-impedance loads. This device is

particularly suitable for implementing buffer

registers, I/O ports, bidirectional bus drivers, and

working registers.

While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the

Q outputs are latched at the logic levels set up at the D inputs.

A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high

or low logic levels) or high-impedance state. In the high-impedance state, the outputs neither load nor drive the

bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines

without need for interface or pullup components.

OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered

while the outputs are in the high-impedance state.

The SN74LV573 is available in TI’s shrink small-outline package (DB), which provides the same I/O pin count

and functionality of standard small-outline packages in less than half the printed-circuit-board area.

The SN54LV573 is characterized for operation over the full military temperature range of −55°C to 125°C. The

SN74LV573 is characterized for operation from −40°C to 85°C.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

EPIC is a trademark of Texas Instruments Incorporated.

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POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

^{POST OFFICE BOX 1443}• HOUSTON, TEXAS 77251−1443

12 3 4 5 6 7 8

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与SN74LV573PWR相关器件

型号	品牌	获取价格	描述	数据表
SN74LV574	TI	获取价格	OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
SN74LV574A	TI	获取价格	OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
SN74LV574ADB	TI	获取价格	OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
SN74LV574ADBR	TI	获取价格	OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
SN74LV574ADBRE4	TI	获取价格	OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
SN74LV574ADBRG4	TI	获取价格	LV/LV-A/LVX/H SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20, GREEN, PLASTIC, SSOP-20
SN74LV574ADGV	TI	获取价格	OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
SN74LV574ADGVR	TI	获取价格	OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
SN74LV574ADGVRE4	TI	获取价格	OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
SN74LV574ADGVRG4	TI	获取价格	LV/LV-A/LVX/H SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20, GREEN, PLASTIC, TVSOP-20

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