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SN74LV373ADGVR PDF预览

SN74LV373ADGVR

更新时间: 2024-11-20 22:37:07
品牌 Logo 应用领域
德州仪器 - TI 锁存器输出元件
页数 文件大小 规格书
17页 516K
描述
OCTAL TRANSPARENT D-TYPE LATCHES WITH 3 STATE OUTPUTS

SN74LV373ADGVR 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOIC
包装说明:TSSOP, TSSOP20,.25,16针数:20
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:1.39
控制类型:ENABLE LOW计数方向:UNIDIRECTIONAL
系列:LV/LV-A/LVX/HJESD-30 代码:R-PDSO-G20
JESD-609代码:e4长度:5 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
最大I(ol):0.016 A湿度敏感等级:1
位数:8功能数量:1
端口数量:2端子数量:20
最高工作温度:125 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP20,.25,16封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法:TR
峰值回流温度(摄氏度):260电源:3.3 V
最大电源电流(ICC):0.02 mAProp。Delay @ Nom-Sup:17 ns
传播延迟(tpd):22 ns认证状态:Not Qualified
座面最大高度:1.2 mm子类别:FF/Latches
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):2.5 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.4 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:4.4 mm
Base Number Matches:1

SN74LV373ADGVR 数据手册

 浏览型号SN74LV373ADGVR的Datasheet PDF文件第2页浏览型号SN74LV373ADGVR的Datasheet PDF文件第3页浏览型号SN74LV373ADGVR的Datasheet PDF文件第4页浏览型号SN74LV373ADGVR的Datasheet PDF文件第5页浏览型号SN74LV373ADGVR的Datasheet PDF文件第6页浏览型号SN74LV373ADGVR的Datasheet PDF文件第7页 
ꢔ ꢕꢌ ꢓ ꢆ ꢑꢀꢌꢈꢌ ꢏ ꢊ ꢖꢌ ꢎꢖ ꢌꢀ  
SCLS407J − APRIL 1998 − REVISED APRIL 2005  
D
D
D
D
D
2-V to 5.5-V V  
Operation  
D
D
D
I
Supports Partial-Power-Down Mode  
CC  
off  
Operation  
Max t of 8.5 ns at 5 V  
pd  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
Typical V  
<0.8 V at V  
(Output Ground Bounce)  
OLP  
CC  
= 3.3 V, T = 25°C  
A
ESD Protection Exceeds JESD 22  
− 2000-V Human-Body Model (A114-A)  
− 200-V Machine Model (A115-A)  
Typical V  
>2.3 V at V  
(Output V  
Undershoot)  
OHV  
CC  
OH  
= 3.3 V, T = 25°C  
A
Support Mixed-Mode Voltage Operation on  
All Ports  
− 1000-V Charged-Device Model (C101)  
SN74LV373A . . . RGY PACKAGE  
(TOP VIEW)  
SN54LV373A . . . FK PACKAGE  
(TOP VIEW)  
SN54LV373A . . . J OR W PACKAGE  
SN74LV373A . . . DB, DGV, DW, NS,  
OR PW PACKAGE  
(TOP VIEW)  
1
20  
OE  
1Q  
1D  
2D  
2Q  
3Q  
3D  
4D  
4Q  
V
CC  
8Q  
8D  
1
2
3
4
5
6
7
8
9
20  
19  
18  
3
2
1
20 19  
18  
8D  
7D  
7Q  
2D  
2Q  
3Q  
3D  
4D  
4
5
6
7
8
19  
18  
17  
16  
15  
14  
13  
12  
2
3
4
5
6
7
8
9
1Q  
1D  
2D  
2Q  
3Q  
3D  
4D  
4Q  
8Q  
8D  
7D  
7Q  
6Q  
6D  
5D  
5Q  
17  
16  
17 7D  
16 7Q  
15 6Q  
14 6D  
13 5D  
12 5Q  
11 LE  
15 6Q  
14  
9 10 11 12 13  
6D  
10  
11  
GND 10  
description/ordering information  
The ’LV373A devices are octal transparent D-type latches designed for 2-V to 5.5-V V  
operation.  
CC  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
QFN − RGY  
SOIC − DW  
Reel of 1000  
Tube of 25  
SN74LV373ARGYR  
SN74LV373ADW  
SN74LV373ADWR  
SN74LV373ANSR  
SN74LV373ADBR  
SN74LV373APW  
SN74LV373APWR  
SN74LV373APWT  
SN74LV373ADGVR  
LV373A  
LV373A  
Reel of 2500  
Reel of 2000  
Reel of 2000  
Tube of 70  
SOP − NS  
74LV373A  
LV373A  
SSOP − DB  
−40°C to 85°C  
Reel of 2000  
Reel of 250  
Reel of 2000  
TSSOP − PW  
TVSOP − DGV  
LV373A  
LV373A  
VFBGA − GQN Reel of 1000  
SN74LV373AGQNR LV373A  
CDIP − J  
CFP − W  
LCCC − FK  
Tube of 20  
Tube of 85  
Tube of 55  
SNJ54LV373AJ  
SNJ54LV373AW  
SNJ54LV373AFK  
SNJ54LV373AJ  
SNJ54LV373AW  
SNJ54LV373AFK  
−55°C to 125°C  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design  
guidelines are available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2005, Texas Instruments Incorporated  
ꢖ ꢁ ꢄꢏꢀꢀ ꢊ ꢌꢓ ꢏꢍꢔ ꢕꢀ ꢏ ꢁ ꢊꢌꢏꢐ ꢗꢘ ꢙꢚ ꢛꢜꢝ ꢞꢟꢠ ꢡꢗ ꢝꢜ ꢡꢗꢢ ꢙꢡꢚ ꢎꢍ ꢊ ꢐ ꢖ ꢋꢌ ꢕꢊ ꢁ  
ꢥꢢ ꢤ ꢢ ꢟ ꢠ ꢗ ꢠ ꢤ ꢚ ꢨ  
ꢚꢗ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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