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SN74LS169N PDF预览

SN74LS169N

更新时间: 2024-11-05 23:06:19
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 计数器触发器逻辑集成电路光电二极管
页数 文件大小 规格书
8页 274K
描述
BCD DECADE/MODULO 16 BINARY SYNCHRONOUS BI-DIRECTIONAL COUNTERS

SN74LS169N 技术参数

生命周期:Transferred零件包装代码:DIP
包装说明:DIP, DIP16,.3针数:16
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.07其他特性:TCO OUTPUT
计数方向:BIDIRECTIONAL系列:LS
JESD-30 代码:R-PDIP-T16JESD-609代码:e0
长度:19.175 mm负载电容(CL):15 pF
负载/预设输入:YES逻辑集成电路类型:BINARY COUNTER
最大频率@ Nom-Sup:25000000 Hz最大I(ol):0.008 A
工作模式:SYNCHRONOUS位数:4
功能数量:1端子数量:16
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP16,.3封装形状:RECTANGULAR
封装形式:IN-LINE电源:5 V
最大电源电流(ICC):34 mA传播延迟(tpd):23 ns
认证状态:Not Qualified座面最大高度:4.44 mm
子类别:Counters最大供电电压 (Vsup):5.25 V
最小供电电压 (Vsup):4.75 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:TTL
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL触发器类型:POSITIVE EDGE
宽度:7.62 mm最小 fmax:25 MHz
Base Number Matches:1

SN74LS169N 数据手册

 浏览型号SN74LS169N的Datasheet PDF文件第2页浏览型号SN74LS169N的Datasheet PDF文件第3页浏览型号SN74LS169N的Datasheet PDF文件第4页浏览型号SN74LS169N的Datasheet PDF文件第5页浏览型号SN74LS169N的Datasheet PDF文件第6页浏览型号SN74LS169N的Datasheet PDF文件第7页 
SN54/74LS168  
SN54/74LS169  
BCD DECADE/MODULO  
16 BINARY SYNCHRONOUS  
BI-DIRECTIONAL COUNTERS  
BCD DECADE/MODULO  
16 BINARY SYNCHRONOUS  
BI-DIRECTIONAL COUNTERS  
The SN54/74LS168 and SN54/74LS169 are fully synchronous 4-stage  
up/down counters featuring a preset capability for programmable operation,  
carry lookahead for easy cascading and a U/D input to control the direction  
of counting. The SN54/74LS168 counts in a BCD decade (8, 4, 2, 1)  
sequence, while the SN54/74LS169 operates in a Modulo 16 binary  
sequence. All state changes, whether in counting or parallel loading, are  
initiated by the LOW-to-HIGH transition of the clock.  
LOW POWER SCHOTTKY  
Low Power Dissipation 100 mW Typical  
High-Speed Count Frequency 30 MHz Typical  
Fully Synchronous Operation  
Full Carry Lookahead for Easy Cascading  
Single Up/Down Control Input  
J SUFFIX  
CERAMIC  
CASE 620-09  
16  
1
Positive Edge-Trigger Operation  
Input Clamp Diodes Limit High-Speed Termination Effects  
N SUFFIX  
PLASTIC  
CASE 648-08  
CONNECTION DIAGRAM DIP (TOP VIEW)  
16  
1
NOTE:  
The Flatpak version  
has the same pinouts  
(Connection Diagram) as  
the Dual In-Line Package.  
D SUFFIX  
SOIC  
CASE 751B-03  
16  
1
ORDERING INFORMATION  
SN54LSXXXJ  
Ceramic  
SN74LSXXXN Plastic  
SN74LSXXXD SOIC  
PIN NAMES  
LOADING (Note a)  
HIGH  
LOW  
CEP  
CET  
CP  
PE  
U/D  
Count Enable Parallel (Active LOW) Input  
0.5 U.L.  
1.0 U.L.  
0.5 U.L.  
0.5 U.L.  
0.5 U.L.  
0.5 U.L.  
0.25 U.L.  
0.5 U.L.  
0.25 U.L.  
0.25 U.L.  
0.25 U.L.  
0.25 U.L.  
LOGIC SYMBOL  
Count Enable Trickle (Active LOW) Input  
Clock Pulse (Active positive going edge) Input  
Parallel Enable (Active LOW) Input  
Up-Down Count Control Input  
Parallel Data Inputs  
P –P  
0
3
3
Q –Q  
0
Flip-Flop Outputs  
Terminal Count (Active LOW) Output  
10 U.L. 5 (2.5) U.L.  
10 U.L. 5 (2.5) U.L.  
TC  
NOTES:  
a. 1 TTL Unit Load (U.L.) = 40 µA HIGH/1.6 mA LOW.  
b. The Output LOW drive factor is 2.5 U.L. for Military (54) and 5 U.L. for Commercial (74)  
b. Temperature Ranges.  
FAST AND LS TTL DATA  
5-302  

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