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SN74LS164NS PDF预览

SN74LS164NS

更新时间: 2024-11-27 13:13:51
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 移位寄存器
页数 文件大小 规格书
4页 82K
描述
LS SERIES, 8-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDIP14, 646-05

SN74LS164NS 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:DIP包装说明:DIP, DIP14,.3
针数:14Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.04
计数方向:RIGHT系列:LS
JESD-30 代码:R-PDIP-T14JESD-609代码:e0
长度:18.86 mm逻辑集成电路类型:SERIAL IN PARALLEL OUT
位数:8功能数量:1
端子数量:14最高工作温度:70 °C
最低工作温度:输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP14,.3封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V传播延迟(tpd):32 ns
认证状态:Not Qualified座面最大高度:5.08 mm
子类别:Shift Registers最大供电电压 (Vsup):5.25 V
最小供电电压 (Vsup):4.75 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:TTL
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
触发器类型:POSITIVE EDGE宽度:7.62 mm
最小 fmax:36 MHzBase Number Matches:1

SN74LS164NS 数据手册

 浏览型号SN74LS164NS的Datasheet PDF文件第2页浏览型号SN74LS164NS的Datasheet PDF文件第3页浏览型号SN74LS164NS的Datasheet PDF文件第4页 
SN54/74LS164  
SERIAL-IN PARALLEL-OUT  
SHIFT REGISTER  
TheSN54/74LS164isahighspeed8-BitSerial-InParallel-OutShiftRegis-  
ter. Serial data is entered through a 2-Input AND gate synchronous with the  
LOW to HIGH transition of the clock. The device features an asynchronous  
MasterResetwhichclearstheregistersettingalloutputsLOWindependentof  
the clock. It utilizes the Schottky diode clamped process to achieve high  
speeds and is fully compatible with all Motorola TTL products.  
SERIAL-IN PARALLEL-OUT  
SHIFT REGISTER  
LOW POWER SCHOTTKY  
Typical Shift Frequency of 35 MHz  
Asynchronous Master Reset  
Gated Serial Data Input  
Fully Synchronous Data Transfers  
Input Clamp Diodes Limit High Speed Termination Effects  
ESD > 3500 Volts  
J SUFFIX  
CERAMIC  
CASE 632-08  
14  
1
CONNECTION DIAGRAM DIP (TOP VIEW)  
N SUFFIX  
PLASTIC  
CASE 646-06  
V
Q
Q
Q
Q
4
MR  
9
CP  
8
CC  
7
6
5
14  
13  
12  
11  
10  
14  
1
NOTE:  
The Flatpak version  
has the same pinouts  
(Connection Diagram) as  
the Dual In-Line Package.  
D SUFFIX  
SOIC  
CASE 751A-02  
14  
1
1
2
3
4
5
6
7
A
B
Q
Q
Q
Q
3
GND  
0
1
2
ORDERING INFORMATION  
SN54LSXXXJ Ceramic  
SN74LSXXXN Plastic  
SN74LSXXXD SOIC  
PIN NAMES  
LOADING (Note a)  
HIGH  
LOW  
LOGIC SYMBOL  
A, B  
CP  
MR  
Data Inputs  
0.5 U.L.  
0.5 U.L.  
0.5 U.L.  
10 U.L.  
0.25 U.L.  
0.25 U.L.  
0.25 U.L.  
Clock (Active HIGH Going Edge) Input  
Master Reset (Active LOW) Input  
Outputs (Note b)  
1
A
LS164  
8-BIT SHIFT REGISTER  
Q Q  
0
5 (2.5) U.L.  
7
2
8
B
NOTES:  
CP  
a) 1 TTL Unit Load (U.L.) = 40 µA HIGH/1.6 mA LOW.  
b) The Output LOW drive factor is 2.5 U.L. for Military (54) and 5 U.L. for Commercial (74)  
Temperature Ranges.  
MR  
Q
Q
Q
Q
Q
Q
Q
Q
0
1
2
3
4
5
6 7  
9
3
4
5
6 10 11 12 13  
V
= PIN 14  
CC  
GND = PIN 7  
FAST AND LS TTL DATA  
5-1  

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