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SN74HC00N3 PDF预览

SN74HC00N3

更新时间: 2024-11-21 09:14:43
品牌 Logo 应用领域
德州仪器 - TI 输入元件
页数 文件大小 规格书
18页 695K
描述
QUADRUPLE 2-INPUT POSITIVE-NAND GATES

SN74HC00N3 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:DIP
包装说明:DIP, DIP14,.3针数:14
Reach Compliance Code:not_compliantHTS代码:8542.39.00.01
风险等级:5.12系列:HC/UH
JESD-30 代码:R-PDIP-T14长度:19.305 mm
逻辑集成电路类型:NAND GATE功能数量:4
输入次数:2端子数量:14
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP14,.3封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:2/6 V传播延迟(tpd):115 ns
认证状态:Not Qualified施密特触发器:NO
座面最大高度:5.08 mm子类别:Gates
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:CMOS温度等级:INDUSTRIAL
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7.62 mmBase Number Matches:1

SN74HC00N3 数据手册

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ꢀꢁꢂ ꢃ ꢄꢅ ꢆ ꢆꢇ ꢀꢁ ꢈꢃ ꢄꢅ ꢆꢆ  
ꢉ ꢊꢋꢌꢍ ꢊꢎꢏ ꢐ ꢑ ꢒꢓꢁ ꢎꢊꢔ ꢎꢕ ꢀꢓ ꢔ ꢓꢖꢐ ꢒꢁꢋꢁ ꢌ ꢗ ꢋꢔꢐ ꢀ  
SCLS181E − DECEMBER 1982 − REVISED AUGUST 2003  
D
D
D
Wide Operating Voltage Range of 2 V to 6 V  
Outputs Can Drive Up To 10 LSTTL Loads  
D
D
D
Typical t = 8 ns  
pd  
4-mA Output Drive at 5 V  
Low Power Consumption, 20-µA Max I  
Low Input Current of 1 µA Max  
CC  
SN54HC00 . . . J OR W PACKAGE  
SN74HC00 . . . D, DB, N, NS, OR PW PACKAGE  
(TOP VIEW)  
SN54HC00 . . . FK PACKAGE  
(TOP VIEW)  
1A  
1B  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
V
CC  
3
2
1
20 19  
18  
4B  
4A  
4Y  
3B  
3A  
3Y  
1Y  
NC  
2A  
4A  
4
5
6
7
8
1Y  
NC  
17  
2A  
16 4Y  
15  
2B  
NC  
2B  
NC  
3B  
14  
2Y  
9 10 11 12 13  
8
GND  
NC − No internal connection  
description/ordering information  
The ’HC00 devices contain four independent 2-input NAND gates. They perform the Boolean function  
Y = A B or Y = A + B in positive logic.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
PDIP − N  
SOIC − D  
Tube of 25  
Tube of 50  
Reel of 2500  
Reel of 250  
Reel of 2000  
Reel of 2000  
Tube of 90  
Reel of 2000  
Reel of 250  
Tube of 25  
Tube of 150  
Tube of 55  
SN74HC00N  
SN74HC00N  
SN74HC00D  
SN74HC00DR  
SN74HC00DT  
SN74HC00NSR  
SN74HC00DBR  
SN74HC00PW  
SN74HC00PWR  
SN74HC00PWT  
SNJ54HC00J  
SNJ54HC00W  
SNJ54HC00FK  
HC00  
SOP − NS  
HC00  
HC00  
−40°C to 85°C  
SSOP − DB  
TSSOP − PW  
HC00  
CDIP − J  
CFP − W  
LCCC − FK  
SNJ54HC00J  
SNJ54HC00W  
SNJ54HC00FK  
−55°C to 125°C  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2003, Texas Instruments Incorporated  
ꢕ ꢙ ꢤ ꢜ ꢛꢧ ꢢꢡ ꢟꢠ ꢡꢛ ꢝꢤ ꢦꢘ ꢞꢙ ꢟ ꢟꢛ ꢮꢓ ꢏꢒ ꢎꢍ ꢯ ꢒꢰꢱꢂ ꢰꢂꢇ ꢞꢦꢦ ꢤꢞ ꢜ ꢞ ꢝꢣ ꢟꢣꢜ ꢠ ꢞ ꢜ ꢣ ꢟꢣ ꢠꢟꢣ ꢧ  
ꢟ ꢣ ꢠ ꢟꢘ ꢙꢭ ꢛꢚ ꢞ ꢦꢦ ꢤꢞ ꢜ ꢞ ꢝ ꢣ ꢟ ꢣ ꢜ ꢠ ꢨ  
ꢢ ꢙꢦ ꢣꢠꢠ ꢛ ꢟꢩꢣ ꢜ ꢫꢘ ꢠꢣ ꢙ ꢛꢟꢣ ꢧꢨ ꢕ ꢙ ꢞꢦ ꢦ ꢛ ꢟꢩꢣ ꢜ ꢤꢜ ꢛ ꢧꢢꢡ ꢟꢠ ꢇ ꢤꢜ ꢛ ꢧꢢꢡ ꢟꢘꢛ ꢙ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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