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SN74HC02DB PDF预览

SN74HC02DB

更新时间: 2024-01-01 13:41:54
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德州仪器 - TI 输入元件
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5页 79K
描述
QUADRUPLE 2-INPUT POSITIVE-NOR GATES

SN74HC02DB 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SSOP包装说明:SSOP, SSOP14,.3
针数:14Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.17
系列:HC/UHJESD-30 代码:R-PDSO-G14
长度:6.2 mm负载电容(CL):50 pF
逻辑集成电路类型:NOR GATE最大I(ol):0.004 A
功能数量:4输入次数:2
端子数量:14最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:SSOP封装等效代码:SSOP14,.3
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, SHRINK PITCH
峰值回流温度(摄氏度):NOT SPECIFIED电源:2/6 V
Prop。Delay @ Nom-Sup:23 ns传播延迟(tpd):115 ns
认证状态:Not Qualified施密特触发器:NO
座面最大高度:2 mm子类别:Gates
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:5.3 mmBase Number Matches:1

SN74HC02DB 数据手册

 浏览型号SN74HC02DB的Datasheet PDF文件第2页浏览型号SN74HC02DB的Datasheet PDF文件第3页浏览型号SN74HC02DB的Datasheet PDF文件第4页浏览型号SN74HC02DB的Datasheet PDF文件第5页 
SN54HC02, SN74HC02  
QUADRUPLE 2-INPUT POSITIVE-NOR GATES  
SCLS076B – DECEMBER 1982 – REVISED MAY 1997  
SN54HC02 . . . J OR W PACKAGE  
SN74HC02 . . . D, DB, N, OR PW PACKAGE  
(TOP VIEW)  
Package Options Include Plastic  
Small-Outline (D), Shrink Small-Outline  
(DB), Thin Shrink Small-Outline (PW), and  
Ceramic Flat (W) Packages, Ceramic Chip  
Carriers (FK), and Standard Plastic (N) and  
Ceramic (J) 300-mil DIPs  
1Y  
1A  
V
CC  
1
2
3
4
5
6
7
14  
13  
12  
11  
4Y  
4B  
4A  
1B  
2Y  
description  
2A  
10 3Y  
These devices contain four independent 2-input  
NOR gates. They perform the Boolean function  
Y = A + B or Y = A B in positive logic.  
9
8
2B  
3B  
3A  
GND  
The SN54HC02 is characterized for operation  
over the full military temperature range of –55°C  
to 125°C. The SN74HC02 is characterized for  
operation from –40°C to 85°C.  
SN54HC02 . . . FK PACKAGE  
(TOP VIEW)  
3
2
1
20 19  
18  
FUNCTION TABLE  
(each gate)  
4B  
NC  
4A  
1B  
NC  
2Y  
4
5
6
7
8
17  
16  
INPUTS  
OUTPUT  
Y
A
H
X
L
B
X
H
L
15 NC  
14  
9 10 11 12 13  
NC  
2A  
3Y  
L
L
H
logic symbol  
NC – No internal connection  
2
1  
1A  
1
3
1Y  
1B  
2A  
2B  
3A  
3B  
4A  
4B  
5
4
6
2Y  
8
10  
3Y  
9
11  
12  
13  
4Y  
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.  
Pin numbers shown are for the D, DB, J, N, PW, and W packages.  
logic diagram (positive logic)  
A
B
Y
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 1997, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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