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SN74F573DWR

更新时间： 2024-10-04 01:20:23
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德州仪器 - TI 输出元件
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5页 83K
描述
OCTAL TRANSPARENT D-TYPE LATCHES WITH S0STATE OUTPUTS

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SN74F573DWR 数据手册

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SDFS011A − MARCH 1987 − REVISED OCTOBER 1993  
SN54F573 . . . J PACKAGE  
SN74F573 . . . DW OR N PACKAGE  
(TOP VIEW)  
• Eight Latches in a Single Package  
• 3-State Bus-Driving True Outputs  
• Full Parallel Access for Loading  
• Buffered Control Inputs  
OE  
1D  
2D  
3D  
4D  
5D  
6D  
7D  
8D  
V
CC  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
1Q  
2Q  
3Q  
4Q  
5Q  
6Q  
• Package Options Include Plastic  
Small-Outline Packages, Ceramic Chip  
Carriers, and Standard Plastic and Ceramic  
300-mil DIPs  
description  
13 7Q  
12 8Q  
These 8-bit latches feature 3-state outputs  
designed specifically for driving highly capacitive  
or relatively low-impedance loads. They are  
particularly suitable for implementing buffer  
registers, I/O ports, bidirectional bus drivers, and  
working registers.  
11  
GND  
LE  
SN54F573 . . . FK PACKAGE  
(TOP VIEW)  
The eight latches of the ′F573 are transparent  
D-type latches. While the latch enable (LE) input  
is high, the Q outputs follow the data (D) inputs.  
When the latch enable is taken low, the Q outputs  
are latched at the logic levels set up at the D  
inputs.  
3
2
1
20 19  
18  
4
5
6
7
8
3D  
4D  
5D  
6D  
7D  
2Q  
3Q  
4Q  
5Q  
6Q  
17  
16  
15  
14  
A buffered output enable (OE) input can be used  
to place the eight outputs in either a normal logic  
state (high or low logic levels) or a high-  
impedance state. In the high-impedance state, the  
outputs neither load nor drive the bus lines  
significantly. The high-impedance state and  
increased drive provide the capability to drive bus  
lines without need for interface or pullup  
components.  
9 10 11 12 13  
The output enable (OE) input does not affect the internal operations of the latches. Old data can be retained  
or new data can be entered while the outputs are in the high-impedance state.  
The SN54F573 is characterized for operation over the full military temperature range of −55°C to 125°C. The  
SN74F573 is characterized for operation from 0°C to 70°C.  
FUNCTION TABLE  
(each latch)  
INPUTS  
OUTPUT  
Q
OE  
L
LE  
H
H
L
D
H
L
H
L
L
L
X
X
Q
0
H
X
Z
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Copyright 1993, Texas Instruments Incorporated  
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ꢟ ꢣ ꢠ ꢟꢘ ꢙꢭ ꢛꢚ ꢞ ꢦꢦ ꢤꢞ ꢜ ꢞ ꢝ ꢣ ꢟ ꢣ ꢜ ꢠ ꢨ  
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2−1  
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443  
12345

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SN74F573DWR 替代型号

型号 品牌 替代类型 描述 数据表
SN74F573DWG4 TI

完全替代

 OCTAL TRANSPARENT D-TYPE LATCHES WITH S0STATE OUTPUTS
SN74F573NE4 TI

完全替代

 Octal Transparent D-Type Latches With 3-State Outputs 20-PDIP 0 to 70
SN74F573DWRE4 TI

完全替代

 F/FAST SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20, PLASTIC, DSO-20

与SN74F573DWR相关器件

型号 品牌 获取价格 描述 数据表
SN74F573DWRE4 TI

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 		F/FAST SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20, PLASTIC, DSO-20
SN74F573DWRG4 ROCHESTER

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 		Bus Driver, F/FAST Series, 1-Func, 8-Bit, True Output, TTL, PDSO20, PLASTIC, DSO-20
SN74F573DWRG4 TI

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 		F/FAST SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20, PLASTIC, DSO-20
SN74F573N TI

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 		OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
SN74F573N-10 TI

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 		F/FAST SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDIP20
SN74F573NE4 TI

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 		Octal Transparent D-Type Latches With 3-State Outputs 20-PDIP 0 to 70
SN74F574 TI

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 		OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS
SN74F574DW TI

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 		OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS
SN74F574DW-00R TI

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 		F/FAST SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20
SN74F574DWE4 TI

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 		Octal Edge-Triggered D-Type Flip-Flops With 3-State Outputs 20-SOIC 0 to 70

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