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SN74F574N PDF预览

SN74F574N

更新时间: 2024-11-20 22:53:35
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器触发器逻辑集成电路光电二极管输出元件PC
页数 文件大小 规格书
5页 72K
描述
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS

SN74F574N 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:DIP
包装说明:DIP-20针数:20
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:1.13Samacsys Confidence:
Samacsys Status:ReleasedSamacsys PartID:604859
Samacsys Pin Count:20Samacsys Part Category:Integrated Circuit
Samacsys Package Category:OtherSamacsys Footprint Name:DIP254P762X508-20
Samacsys Released Date:2017-01-12 12:59:53Is Samacsys:N
其他特性:BROADSIDE VERSION OF 374控制类型:INDEPENDENT CONTROL
计数方向:UNIDIRECTIONAL系列:F/FAST
JESD-30 代码:R-PDIP-T20JESD-609代码:e4
长度:24.33 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER最大频率@ Nom-Sup:100000000 Hz
最大I(ol):0.024 A位数:8
功能数量:1端口数量:2
端子数量:20最高工作温度:70 °C
最低工作温度:输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP20,.3
封装形状:RECTANGULAR封装形式:IN-LINE
包装方法:TUBE峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V最大电源电流(ICC):86 mA
Prop。Delay @ Nom-Sup:10 ns传播延迟(tpd):10 ns
认证状态:Not Qualified座面最大高度:5.08 mm
子类别:FF/Latches最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:TTL
温度等级:COMMERCIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
翻译:N/A触发器类型:POSITIVE EDGE
宽度:6.35 mmBase Number Matches:1

SN74F574N 数据手册

 浏览型号SN74F574N的Datasheet PDF文件第2页浏览型号SN74F574N的Datasheet PDF文件第3页浏览型号SN74F574N的Datasheet PDF文件第4页浏览型号SN74F574N的Datasheet PDF文件第5页 
SN74F574  
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOP  
WITH 3-STATE OUTPUTS  
SDFS005A – D3034, SEPTEMBER 1987 – REVISED OCTOBER 1993  
DW OR N PACKAGE  
(TOP VIEW)  
Eight D-Type Flip-Flops in a Single  
Package  
3-State Bus-Driving True Outputs  
Full Parallel Access for Loading  
Buffered Control Inputs  
Package Options Include Plastic  
Small-Outline Packages and Standard  
Plastic 300-mil DIPs  
OE  
1D  
2D  
3D  
4D  
5D  
6D  
7D  
8D  
V
CC  
1
2
3
4
5
6
7
8
9
20  
19  
18  
17  
16  
15  
14  
13  
12  
1Q  
2Q  
3Q  
4Q  
5Q  
6Q  
7Q  
8Q  
description  
This 8-bit flip-flop features 3-state outputs  
designed specifically for driving highly capacitive  
or relatively low-impedance loads. It is particularly  
suitable for implementing buffer registers, I/O  
ports, bidirectional bus drivers, and working  
registers.  
GND 10  
11 CLK  
The eight flip-flops of the SN74F574 are edge-triggered D-type flip-flops. On the positive transition of the clock  
(CLK) input, the Q outputs will be set to the logic levels that were set up at the data (D) inputs.  
A buffered output enable (OE) input can be used to place the eight outputs in either a normal logic state (high  
or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive  
the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus  
lines without need for interface or pullup components.  
The output enable (OE) does not affect the internal operations of the flip-flops. Old data can be retained or new  
data can be entered while the outputs are in the high-impedance state.  
The SN74F574 is characterized for operation from 0°C to 70°C.  
FUNCTION TABLE  
(each flip-flop)  
INPUTS  
OUTPUT  
Q
OE  
L
CLK  
D
H
L
H
L
L
L
L
X
X
X
Q
0
H
Z
Copyright 1993, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
2–1  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

SN74F574N 替代型号

型号 品牌 替代类型 描述 数据表
SN74F574NE4 TI

类似代替

OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS
74F574SC FAIRCHILD

类似代替

Octal D-Type Flip-Flop with 3-STATE Outputs

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