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ꢊ ꢋꢌꢆꢍꢈꢎ ꢏꢐ ꢎꢑꢌ ꢒꢓ ꢐꢐ ꢎꢒ ꢎꢏꢈ ꢏꢑꢌ ꢔꢕ ꢎꢈꢄ ꢍ ꢓꢕ ꢑ ꢄꢍꢊ ꢕ ꢀ
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SDFS028A − D2932, MARCH 1987 − REVISED OCTOBER 1993
SN54F534A . . . J PACKAGE
SN74F534A . . . DW OR N PACKAGE
(TOP VIEW)
• 3-State Bus-Driving Inverting Outputs
• Buffered Control Inputs
• Package Options Incude Plastic
Small-Outline Packages, Ceramic Chip
Carriers, and Standard Plastic and Ceramic
300-mil DIPs
OE
1Q
V
CC
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
8Q
8D
7D
7Q
6Q
6D
5D
5Q
1D
2D
description
2Q
3Q
These 8-bit flip-flops feature 3-state outputs
designed specifically for driving highly capacitive
or relatively low-impedance loads. They are
particularly suitable for implementing buffer
registers, I/O ports, bidirectional bus drivers, and
working registers.
3D
4D
4Q
GND
11 CLK
SN54F534A . . . FK PACKAGE
(TOP VIEW)
The eight flip-flops of the ′F534A are
edge-triggered D-type flip-flops. On the positive
transition of the clock, the Q outputs are set to the
complement of the logic states that were set up at
the data (D) inputs. The ′F534A is equivalent to the
′F374 except for having inverted outputs.
3
2
1
20 19
18
8D
7D
7Q
6Q
6D
2D
2Q
3Q
3D
4D
4
5
6
7
8
17
16
15
14
A buffered output enable (OE ) control input can
be used to place the eight outputs in either a
normal logic state (high or low logic levels) or a
high-impedance state. In the high-impedance
state, the outputs neither load nor drive the bus
lines significantly. The high-impedance state and
increased drive provide the capability to drive bus
lines without need for interface or pullup
components.
9 10 11 12 13
The output enable (OE) does not affect the internal operations of the flip-flops. Old data can be retained or new
data can be entered while the outputs are off.
The SN54F534A is characterized for operation over the full military temperature range of −55°C to 125°C. The
SN74F534A is characterized for operation from 0°C to 70°C.
FUNCTION TABLE
(each flip-flop)
INPUTS
OUTPUT
Q
OE
L
CLK
↑
D
H
L
L
L
↑
H
L
L
X
X
Q
0
H
X
Z
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Copyright 1993, Texas Instruments Incorporated
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2−1
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