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SN74F51D PDF预览

SN74F51D

更新时间: 2024-11-27 19:51:35
品牌 Logo 应用领域
德州仪器 - TI 输入元件光电二极管逻辑集成电路触发器
页数 文件大小 规格书
5页 58K
描述
Dual 2-wide 2-input and 3-input AND-NOR gates 14-SOIC 0 to 70

SN74F51D 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP, SOP14,.25针数:14
Reach Compliance Code:not_compliantHTS代码:8542.39.00.01
风险等级:5.87其他特性:ASYMMETRICAL INPUTS
系列:F/FASTJESD-30 代码:R-PDSO-G14
长度:8.65 mm负载电容(CL):50 pF
逻辑集成电路类型:AND-OR-INVERT GATE最大I(ol):0.02 A
功能数量:2输入次数:6
端子数量:14最高工作温度:70 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP14,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
最大电源电流(ICC):7.5 mAProp。Delay @ Nom-Sup:6.5 ns
传播延迟(tpd):4.5 ns认证状态:Not Qualified
施密特触发器:NO座面最大高度:1.75 mm
子类别:Gates最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:TTL
温度等级:COMMERCIAL端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:3.9 mm
Base Number Matches:1

SN74F51D 数据手册

 浏览型号SN74F51D的Datasheet PDF文件第2页浏览型号SN74F51D的Datasheet PDF文件第3页浏览型号SN74F51D的Datasheet PDF文件第4页浏览型号SN74F51D的Datasheet PDF文件第5页 
SN54F51, SN74F51  
DUAL 2-WIDE 2-INPUT, 2-WIDE 3-INPUT AND-OR-INVERT GATES  
SDFS092 – JANUARY 1989 – REVISED OCTOBER 1993  
SN54F51 . . . J PACKAGE  
SN74F51 . . . D OR N PACKAGE  
(TOP VIEW)  
Package Options Include Plastic  
Small-Outline Packages, Ceramic Chip  
Carriers, and Standard Plastic and Ceramic  
300-mil DIPs  
1A  
2A  
2B  
2C  
2D  
V
CC  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
1C  
1B  
1F  
1E  
1D  
1Y  
description  
These devices contain 2-wide 2-input and 2-wide  
3-input AND-OR-INVERT gates. They perform  
the following Boolean functions:  
2Y  
GND  
8
1Y = (1A 1B 1C) + (1D 1E 1F)  
2Y = (2A 2B) + (2C 2D)  
SN54F51 . . . FK PACKAGE  
(TOP VIEW)  
The SN54F51 is characterized for operation over  
the full military temperature range of 55°C to  
125°C. The SN74F51 is characterized for  
operation from 0°C to 70°C.  
3
2
1
20 19  
18  
2B  
NC  
2C  
NC  
2D  
1B  
NC  
1F  
4
5
6
7
8
FUNCTION TABLES  
GATE 1  
17  
16  
15 NC  
14  
INPUTS  
OUTPUT  
1Y  
1E  
1A  
H
1B  
H
1C  
1D  
X
1E  
X
1F  
X
9 10 11 12 13  
H
X
L
L
X
X
H
H
H
All other combinations  
H
NC – No internal connection  
GATE 2  
INPUTS  
OUTPUT  
2Y  
2A  
H
2B  
H
2C  
X
2D  
X
L
L
X
X
H
H
All other combinations  
H
Copyright 1993, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
2–1  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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