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SN74CBTLV3257_10

更新时间： 2024-11-09 09:14:47
品牌 Logo 应用领域
德州仪器 - TI 解复用器
页数 文件大小 规格书
20页 786K
描述
LOW-VOLTAGE 4-BIT 1-OF-2 FET MULTIPLEXER/DEMULTIPLEXER

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SN74CBTLV3257_10 数据手册

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SCDS040I − DECEMBER 1997 − REVISED OCTOBER 2003  
D
D
D
5-Ω Switch Connection Between Two Ports  
Rail-to-Rail Switching on Data I/O Ports  
D
ESD Protection Exceeds JESD 22  
− 2000-V Human-Body Model (A114-A)  
− 200-V Machine Model (A115-A)  
I
Supports Partial-Power-Down Mode  
off  
Operation  
D
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
RGY PACKAGE  
(TOP VIEW)  
D, DBQ, DGV, OR PW PACKAGE  
(TOP VIEW)  
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2
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8
16  
15  
14  
13  
12  
11  
10  
9
V
S
1B1  
1B2  
1A  
2B1  
2B2  
2A  
CC  
OE  
4B1  
4B2  
4A  
3B1  
3B2  
3A  
1
16  
1B1  
1B2  
1A  
2B1  
2B2  
2A  
15  
14  
13  
12  
11  
10  
2
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7
OE  
4B1  
4B2  
4A  
3B1  
3B2  
GND  
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description/ordering information  
The SN74CBTLV3257 is a 4-bit 1-of-2 high-speed FET multiplexer/demultiplexer. The low on-state resistance  
of the switch allows connections to be made with minimal propagation delay.  
The select (S) input controls the data flow. The FET multiplexers/demultiplexers are disabled when the  
output-enable (OE) input is high.  
This device is fully specified for partial-power-down applications using I . The I feature ensures that  
off  
off  
damaging current will not backflow through the device when it is powered down. The device has isolation during  
power off.  
To ensure the high-impedance state during power up or power down, OE should be tied to V  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
through a pullup  
CC  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
†
PACKAGE  
T
A
QFN − RGY  
SOIC − D  
Tape and reel  
SN74CBTLV3257RGYR  
SN74CBTLV3257D  
CL257  
Tube  
CBTLV3257  
Tape and reel  
SN74CBTLV3257DR  
SN74CBTLV3257DBQR  
SN74CBTLV3257PWR  
SN74CBTLV3257DGVR  
−40°C to 85°C  
SSOP (QSOP) − DBQ Tape and reel  
CL257  
CL257  
CL257  
TSSOP − PW  
TVSOP − DGV  
Tape and reel  
Tape and reel  
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines  
are available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
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Copyright 2003, Texas Instruments Incorporated  
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...20

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SN74CBTLV3257DRE4 TI

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