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SN74AVCA164245 PDF预览

SN74AVCA164245

更新时间： 2024-11-05 22:36:59
品牌 Logo 应用领域
德州仪器 - TI 总线收发器输出元件
页数 文件大小 规格书
14页 361K
描述
16 BIT DUAL SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3 STATE OUTPUTS

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SN74AVCA164245 数据手册

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SCES395A − JULY 2002 − REVISED MAY 2004  
D
D
Member of the Texas Instruments  
WidebusFamily  
DOCCircuitry Dynamically Changes  
Output Impedance, Resulting in Noise  
D
D
I
Supports Partial-Power-Down Mode  
off  
Operation  
Fully Configurable Dual-Rail Design Allows  
Each Port to Operate Over the Full 1.4-V to  
3.6-V Power-Supply Range  
Reduction Without Speed Degradation  
Dynamic Drive Capability Is Equivalent to  
Standard Outputs With I and I of  
D
D
D
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
OH  
OL  
24 mA at 2.5-V V  
CC  
ESD Protection Exceeds JESD 22  
− 2000-V Human-Body Model (A114-A)  
− 200-V Machine Model (A115-A)  
D
D
D
Control Inputs V /V Levels are  
IH IL  
CCA  
Referenced to V  
Voltage  
− 1000-V Charged-Device Model (C101)  
If Either V  
Are in the High-Impedance State  
Input Is at GND, Both Ports  
CC  
Overvoltage-Tolerant Inputs/Outputs Allow  
Mixed-Voltage-Mode Data Communications  
description/ordering information  
This 16-bit (dual-octal) noninverting bus transceiver uses two separate configurable power-supply rails. The  
A-port is designed to track V . V accepts any supply voltage from 1.4 V to 3.6 V. The B-port is designed  
CCA CCA  
to track V  
. V  
accepts any supply voltage from 1.4 V to 3.6 V. This allows for universal low-voltage  
CCB CCB  
bidirectional translation between any of the 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.  
The SN74AVCA164245 is designed for asynchronous communication between data buses. The device  
transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the  
direction-control (DIR) input. The output-enable (OE) input can be used to disable the outputs so the buses are  
effectively isolated.  
The SN74AVCA164245 is designed so that the control pins (1DIR, 2DIR, 1OE, and 2OE) are supplied by V  
.
CCA  
To ensure the high-impedance state during power up or power down, OE should be tied to V  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
through a pullup  
CCA  
This device is fully specified for partial-power-down applications using I . The I circuitry disables the outputs,  
off  
off  
preventing damaging current backflow through the device when it is powered down. If either V  
then both ports are in the high-impedance state.  
input is at GND,  
CC  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
†
PACKAGE  
T
A
TSSOP − DGG Tape and reel SN74AVCA164245GR  
AVCA164245  
WA4245  
TVSOP − DGV  
VFBGA − GQL  
Tape and reel SN74AVCA164245VR  
Tape and reel SN74AVCA164245KR  
−40°C to 85°C  
WA4245  
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines  
are available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
DOC and Widebus are trademarks of Texas Instruments.  
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Copyright 2004, Texas Instruments Incorporated  
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...14

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