ꢀꢁ ꢂꢃ ꢄꢅ ꢆꢇ ꢈ ꢇꢃ
ꢉ ꢊꢋꢌꢆꢊ ꢋ ꢍꢎ ꢀꢏ ꢁꢈ ꢉ ꢍ ꢀꢐ ꢑꢒꢏ ꢓꢓꢌꢓ ꢎꢏꢈ ꢈ ꢍꢎ ꢏꢁ ꢔꢍ ꢎ ꢓꢍ ꢎ
SCES578 – JUNE 2004
D
D
D
Available in the Texas Instruments
NanoStar and NanoFree Packages
Low Static-Power Consumption;
D
D
D
D
3.6-V I/O Tolerant to Support Mixed-Mode
Signal Operation
t
= 4.9 ns Max at 3.3 V
pd
I
= 0.9-µA Max
CC
Suitable for Point-to-Point Applications
Low Dynamic-Power Consumption;
= 4.4 pF Typical at 3.3 V
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
C
pd
D
Low Input Capacitance; C = 1.5 pF Typical
i
Low Noise − Overshoot and Undershoot
D
ESD Performance Tested Per JESD 22
− 2000-V Human-Body Model
(A114-B, Class II)
D
<10% of V
CC
− 200-V Machine Model (A115-A)
− 1000-V Charged-Device Model (C101)
D
I
Supports Partial-Power-Down Mode
off
Operation
D
ESD Protection Exceeds 5000-V With
Human-Body Model
D
D
D
Includes Schmitt-Trigger Inputs
Wide Operating V
Range of 0.8 V to 3.6 V
CC
Optimized for 3.3-V Operation
DBV OR DCK PACKAGE
(TOP VIEW)
YEP OR YZP PACKAGE
(BOTTOM VIEW)
3 4
2
GND
A
DNU
Y
V
1
2
3
5
4
NC
A
GND
V
Y
CC
1 5
CC
DNU − Do not use
NC − No internal connection
description/ordering information
The AUP family is TI’s premier solution to the industry’s low-power needs in battery-powered portable
applications. This family ensures a very low static and dynamic power consumption across the entire V range
CC
of 0.8 V to 3.6 V, resulting in an increased battery life. This product also maintains excellent signal integrity (see
Figures 1 and 2).
Switching Characteristics
Static-Power Consumption
Dynamic-Power Consumption
(pF)
100%
†
at 25 MHz
(µA)
3.5
3
100%
80%
60%
80%
2.5
2
Input
Output
60%
40%
3.3-V
3.3-V
LVC †
Logic
1.5
1
†
Logic
40%
0.5
0
20%
0%
20%
0%
AUP
AUP
AUP
−0.5
10
15 20
Time − ns
0
5
25
35 40 45
30
†
Single, dual, and triple gates.
†
AUP1G08 data at C = 15 pF.
L
Figure 2. Excellent Signal Integrity
Figure 1. AUP−The Lowest-Power Family
This device functions as an independent gate with Schmitt-trigger inputs, which allows for slow input transition
and better switching-noise immunity at the input.
NanoStar and NanoFree package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar and NanoFree are trademarks of Texas Instruments.
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Copyright 2004, Texas Instruments Incorporated
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