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SN74AUC1G126YEAR PDF预览

SN74AUC1G126YEAR

更新时间： 2024-11-02 21:05:39
品牌 Logo 应用领域
德州仪器 - TI 驱动输出元件逻辑集成电路
页数 文件大小 规格书
9页 134K
描述
AUC SERIES, 1-BIT DRIVER, TRUE OUTPUT, PBGA5, DSBGA-5

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SN74AUC1G126YEAR 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Obsolete零件包装代码：BGA
包装说明：VFBGA, BGA5,2X3,20针数：5
Reach Compliance Code：not_compliantHTS代码：8542.39.00.01
风险等级：5.48控制类型：ENABLE HIGH
系列：AUCJESD-30 代码：R-PBGA-B5
长度：1.4 mm逻辑集成电路类型：BUS DRIVER
最大I（ol）：0.005 A位数：1
功能数量：1端口数量：2
端子数量：5最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：VFBGA封装等效代码：BGA5,2X3,20
封装形状：RECTANGULAR封装形式：GRID ARRAY, VERY THIN PROFILE, FINE PITCH
包装方法：TAPE AND REEL峰值回流温度（摄氏度）：NOT SPECIFIED
电源：1.2/2.5 V传播延迟（tpd）：3.6 ns
认证状态：Not Qualified座面最大高度：0.5 mm
子类别：Bus Driver/Transceivers最大供电电压 (Vsup)：2.7 V
最小供电电压 (Vsup)：0.8 V标称供电电压 (Vsup)：1.2 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子形式：BALL
端子节距：0.5 mm端子位置：BOTTOM
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：0.9 mm
Base Number Matches：1

SN74AUC1G126YEAR 数据手册

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SCES383E – MARCH 2002 – REVISED DECEMBER 2002  
DBV OR DCK PACKAGE  
(TOP VIEW)  
D
D
Available in the Texas Instruments  
NanoStar and NanoFree Packages  
Optimized for 1.8-V Operation and Is 3.6-V  
I/O Tolerant to Support Mixed-Mode Signal  
Operation  
OE  
A
GND  
V
Y
1
2
3
5
4
CC  
D
I
Supports Partial-Power-Down Mode  
off  
Operation  
YEA OR YZA PACKAGE  
(BOTTOM VIEW)  
D
D
D
D
D
Sub 1-V Operable  
Max t of 2.5 ns at 1.8 V  
pd  
Low Power Consumption, 10-µA Max I  
±8-mA Output Drive at 1.8 V  
3 4  
2
GND  
A
OE  
Y
V
CC  
1 5  
CC  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
D
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
– 1000-V Charged-Device Model (C101)  
description/ordering information  
This bus buffer gate is operational at 0.8-V to 2.7-V V , but is designed specifically for 1.65-V to 1.95-V V  
CC  
operation.  
CC  
The SN74AUC1G126 is a single line driver with a 3-state output. The output is disabled when the output-enable  
(OE) input is low.  
To ensure the high-impedance state during power up or power down, OE should be tied to GND through a  
pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the  
driver.  
NanoStar and NanoFree package technology is a major breakthrough in IC packaging concepts, using the  
die as the package.  
This device is fully specified for partial-power-down applications using I . The I circuitry disables the outputs,  
off  
off  
preventing damaging current backflow through the device when it is powered down.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
†
PACKAGE  
T
A
‡
NanoStar  
WCSP (DSBGA) – YEA  
Tape and reel SN74AUC1G126YEAR  
_ _ _UN_  
NanoFree  
WCSP (DSBGA) – YZA (Pb-free)  
Tape and reel SN74AUC1G126YZAR  
–40°C to 85°C  
SOT (SOT-23) – DBV  
Tape and reel SN74AUC1G126DBVR  
Tape and reel SN74AUC1G126DCKR  
U26_  
UN_  
SOT (SC-70) – DCK  
†
‡
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.  
YEA/YZA: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one  
following character to designate the assembly/test site.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
NanoStar and NanoFree are trademarks of Texas Instruments.  
Copyright 2002, Texas Instruments Incorporated  
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...9

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