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SN74AS876NT3 PDF预览

SN74AS876NT3

更新时间: 2024-11-23 15:52:11
品牌 Logo 应用领域
德州仪器 - TI 驱动光电二极管输出元件逻辑集成电路触发器
页数 文件大小 规格书
19页 924K
描述
AS SERIES, DUAL 4-BIT DRIVER, INVERTED OUTPUT, PDIP24

SN74AS876NT3 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:DIP, DIP24,.3Reach Compliance Code:not_compliant
风险等级:5.67其他特性:WITH PRESET
系列:ASJESD-30 代码:R-PDIP-T24
长度:31.64 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER位数:4
功能数量:2端口数量:2
端子数量:24最高工作温度:70 °C
最低工作温度:输出特性:3-STATE
输出极性:INVERTED封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP24,.3
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT SPECIFIED最大电源电流(ICC):150 mA
传播延迟(tpd):10.5 ns认证状态:Not Qualified
座面最大高度:5.08 mm子类别:FF/Latches
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:TTL温度等级:COMMERCIAL
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
触发器类型:POSITIVE EDGE宽度:7.62 mm
Base Number Matches:1

SN74AS876NT3 数据手册

 浏览型号SN74AS876NT3的Datasheet PDF文件第2页浏览型号SN74AS876NT3的Datasheet PDF文件第3页浏览型号SN74AS876NT3的Datasheet PDF文件第4页浏览型号SN74AS876NT3的Datasheet PDF文件第5页浏览型号SN74AS876NT3的Datasheet PDF文件第6页浏览型号SN74AS876NT3的Datasheet PDF文件第7页 
ꢀꢁꢇ ꢃ ꢄꢀ ꢆ ꢇ ꢃꢉ ꢊꢀ ꢁꢇ ꢃꢄ ꢀ ꢆꢇ ꢋ  
ꢅꢊ  
SDAS061C − APRIL 1982 − REVISED JANUARY 1995  
SN54ALS874B . . . JT PACKAGE  
SN74ALS874B, SN74AS874 . . . DW OR NT PACKAGE  
(TOP VIEW)  
3-State Buffer-Type Outputs Drive Bus  
Lines Directly  
Bus-Structured Pinout  
1
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
1CLR  
1OE  
1D1  
1D2  
1D3  
1D4  
2D1  
2D2  
2D3  
2D4  
2OE  
GND  
V
CC  
Choice of True or Inverting Logic  
− SN54ALS874B, SN74ALS874B,  
SN74AS874 Have True Outputs  
− SN74ALS876A, SN74AS876 Have  
Inverting Outputs  
2
1CLK  
1Q1  
1Q2  
1Q3  
1Q4  
2Q1  
2Q2  
2Q3  
2Q4  
2CLK  
2CLR  
3
4
5
6
Asynchronous Clear  
7
Package Options Include Plastic  
8
Small-Outline (DW) Packages, Plastic (FN)  
and Ceramic (FK) Chip Carriers, and  
Standard Plastic (NT) and Ceramic (JT)  
300-mil DIPs  
9
10  
11  
12  
description  
SN54ALS874B . . . FK PACKAGE  
(TOP VIEW)  
These dual 4-bit D-type edge-triggered flip-flops  
feature 3-state outputs designed specifically as  
bus drivers. They are particularly suitable for  
implementing buffer registers, I/O ports,  
bidirectional bus drivers, and working registers.  
4
3
2 1 28 27 26  
25  
24 1Q3  
1Q2  
1D2  
1D3  
1D4  
NC  
2D1  
2D2  
2D3  
5
6
7
8
9
The edge-triggered flip-flops enter data on the  
low-to-high transition of the clock (CLK) input.  
The SN54ALS874B, SN74ALS874B, and  
SN74AS874 have clear (CLR) inputs and  
noninverting Q outputs. The SN74ALS876A and  
SN74AS876 have preset (PRE) inputs and  
inverting Q outputs; taking PRE low causes the  
four Q or Q outputs to go low independently of the  
clock.  
1Q4  
NC  
23  
22  
21  
20  
19  
2Q1  
2Q2  
2Q3  
10  
11  
12 13 14 15 16 17 18  
The SN54ALS874B is characterized for operation  
NC − No internal connection  
over the full military temperature range of 55°C  
to 125°C. The SN74ALS874B, SN74ALS876A,  
SN74AS874, and SN74AS876 devices are  
characterized for operation from 0°C to 70°C.  
SN74ALS876A, SN74AS876 . . . DW OR NT PACKAGE  
(TOP VIEW)  
1
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
1PRE  
1OE  
1D1  
1D2  
1D3  
1D4  
2D1  
2D2  
2D3  
2D4  
2OE  
GND  
V
CC  
2
1CLK  
1Q1  
1Q2  
1Q3  
1Q4  
2Q1  
2Q2  
2Q3  
2Q4  
2CLK  
2PRE  
3
4
5
6
7
8
9
10  
11  
12  
ꢐꢤ  
Copyright 1995, Texas Instruments Incorporated  
ꢠ ꢤ ꢡ ꢠꢙ ꢚꢮ ꢜꢛ ꢟ ꢧꢧ ꢥꢟ ꢝ ꢟ ꢞ ꢤ ꢠ ꢤ ꢝ ꢡ ꢩ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443  

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