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SN74AS877DW PDF预览

SN74AS877DW

更新时间: 2024-11-23 13:13:47
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德州仪器 - TI 控制器
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SN74AS877DW 数据手册

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ꢀꢁꢂ ꢃ ꢄꢀ ꢅ ꢆ ꢆꢇ ꢈꢀ ꢁꢆ ꢃꢄ ꢀ ꢅꢆ ꢆ  
ꢅ ꢉꢊꢋ ꢌꢈ ꢍꢁꢋ ꢎꢏꢐ ꢀꢄꢑꢈꢌ ꢐꢄ ꢁꢀꢒꢏ ꢋꢎꢏ ꢐꢈ ꢓꢔ ꢐꢌ ꢈꢒꢔ ꢁꢌ ꢐꢔ ꢑꢑ ꢏ ꢐꢀ  
SDAS234 − D2661, DECEMBER 1982 − REVISED AUGUST 1985  
SN54AS877 . . . JT PACKAGE  
Package Options Include Plastic Small  
Outline Packages, Both Plastic and  
Ceramic Chip Carriers, and Standard  
Plastic and Ceramic 300-mil DIPs  
SN74AS877 . . . DW OR NT PACKAGE  
(TOP VIEW)  
S0  
S1  
S2  
A1  
A2  
A3  
A4  
A5  
A6  
V
CC  
1
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
Buffered 3-State Outputs Drive Bus Lines  
CLK  
SERIN  
B1  
B2  
B3  
B4  
B5  
B6  
B7  
2
Directly  
3
Cascaded to n-Bits  
4
Eight Selectable Transceiver/Port  
5
Functions:  
6
A to B or B to A  
7
Register to A or Register to B  
Shifted to A or Shifted to B  
Off-Line Shifts (A and B Ports in  
High-Impedance State)  
Register Clear  
8
9
A7  
A8  
GND  
10  
11  
12  
B8  
Q8  
Particularly Suitable for Use in Signature  
Analysis Circuitry  
SN54AS877 . . . JT PACKAGE  
SN74AS877 . . . DW OR NT PACKAGE  
Serial Register Provides:  
Parallel Storage of Either A or B Input  
Data  
(TOP VIEW)  
Serial Transmission of Data from Either  
A or B Port  
4
3
2 1 28 27 26  
Dependable Texas Instruments Quality and  
5
6
7
8
9
25 B1  
B2  
23 B3  
NC  
22  
B4  
21  
A1  
A2  
A3  
NC  
A4  
A5  
A6  
Reliability  
24  
description  
The ’AS877 features two 8-bit I/O ports (A1-A8  
and B1-B8), an 8-bit parallel-load, serial-in,  
parallel-out shift register, and control logic. With  
these features, this device is capable of  
performing eight selectable transceiver or port  
functions, depending on the state of the three  
select lines S0, S1, and S2. These functions  
include: transferring data from port A to port B or  
vice versa (i.e., the transceiver function),  
transferring data from the register to either port,  
B5  
20  
10  
B6  
19  
11  
12 13 14 15 16 17 18  
NC − No internal connection  
serial shifting data to either port, performing off-line shifts (with A and B ports in high-impedance state), and  
clearing the register. Synchronous parallel loading of the internal register can be accomplished from either port  
on the positive transition of the clock while serially shifting data in via the SERIN input. The ’AS877 is ideally  
suited for applications needing signature-analysis circuitry to enhance system verification and/or fault analysis.  
All serial data is shifted right. All outputs are buffer-type outputs designed specifically to drive bus lines directly  
and all are 3-state except for Q8, which is a totem-pole output.  
The SN54AS877 is characterized for operation over the full military temperature range of 55°C to 125°C. The  
SN74AS877 is characterized for operation from 0°C to 70°C.  
ꢌꢢ  
Copyright 1985, Texas Instruments Incorporated  
ꢞ ꢢ ꢟ ꢞꢗ ꢘꢬ ꢚꢙ ꢝ ꢥꢥ ꢣꢝ ꢛ ꢝ ꢜ ꢢ ꢞ ꢢ ꢛ ꢟ ꢧ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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