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SN74ALVCH374DWG4 PDF预览

SN74ALVCH374DWG4

更新时间： 2024-11-16 15:52:07
品牌 Logo 应用领域
德州仪器 - TI 驱动光电二极管输出元件逻辑集成电路触发器
页数 文件大小 规格书
15页 560K
描述
ALVC/VCX/A SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20, GREEN, PLASTIC, SOIC-20

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SN74ALVCH374DWG4 技术参数

是否无铅：不含铅是否Rohs认证：符合
生命周期：Obsolete零件包装代码：SOIC
包装说明：GREEN, PLASTIC, SOIC-20针数：20
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.73Is Samacsys：N
系列：ALVC/VCX/AJESD-30 代码：R-PDSO-G20
JESD-609代码：e4长度：12.8 mm
负载电容（CL）：50 pF逻辑集成电路类型：BUS DRIVER
最大I（ol）：0.024 A湿度敏感等级：1
位数：8功能数量：1
端口数量：2端子数量：20
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：3-STATE输出极性：TRUE
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装等效代码：SOP20,.4封装形状：RECTANGULAR
封装形式：SMALL OUTLINE包装方法：TUBE
峰值回流温度（摄氏度）：260电源：3.3 V
Prop。Delay @ Nom-Sup：3.6 ns传播延迟（tpd）：6.4 ns
认证状态：Not Qualified座面最大高度：2.65 mm
子类别：FF/Latches最大供电电压 (Vsup)：3.6 V
最小供电电压 (Vsup)：1.65 V标称供电电压 (Vsup)：1.8 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
触发器类型：POSITIVE EDGE宽度：7.5 mm
Base Number Matches：1

SN74ALVCH374DWG4 数据手册

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SN74ALVCH374  
OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP  
WITH 3-STATE OUTPUTS  
www.ti.com  
SCES118G–JULY 1997–REVISED OCTOBER 2004  
FEATURES  
DB, DGV, DW, N, OR PW PACKAGE  
(TOP VIEW)  
•
•
•
•
Operates From 1.65 V to 3.6 V  
Max tpd of 3.6 ns at 3.3 V  
OE  
1Q  
1D  
2D  
2Q  
3Q  
3D  
4D  
4Q  
V
CC  
1
2
3
4
5
6
7
8
9
20  
19  
18  
17  
16  
15  
±24-mA Output Drive at 3.3 V  
8Q  
8D  
7D  
7Q  
6Q  
Bus Hold on Data Inputs Eliminates the Need  
for External Pullup/Pulldown Resistors  
•
•
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
14 6D  
13 5D  
12 5Q  
11 CLK  
GND 10  
– 1000-V Charged-Device Model (C101)  
DESCRIPTION/ORDERING INFORMATION  
This octal edge-triggered D-type flip-flop is designed for 1.65-V to 3.6-V VCC operation.  
The SN74ALVCH374 is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers,  
and working registers. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels  
at the data (D) inputs.  
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or  
low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the  
bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines  
without interface or pullup components.  
OE does not affect internal operations of the latch. Old data can be retained or new data can be entered while  
the outputs are in the high-impedance state.  
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors  
with the bus-hold circuitry is not recommended.  
ORDERING INFORMATION  
TA  
PACKAGE(1)  
ORDERABLE PART NUMBER  
SN74ALVCH374N  
TOP-SIDE MARKING  
PDIP - N  
Tube  
SN74ALVCH374N  
Tube  
SN74ALVCH374DW  
SOIC - DW  
SSOP - DB  
TSSOP - PW  
TVSOP - DGV  
ALVCH374  
VB374  
Tape and reel  
SN74ALVCH374DWR  
SN74ALVCH374DBR  
SN74ALVCH374PW  
-40°C to 85°C  
Tape and reel  
Tube  
VB374  
Tape and reel  
Tape and reel  
SN74ALVCH374PWR  
SN74ALVCH374DGVR  
VB374  
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 1997–2004, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
1234567...15

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SN74ALVCH374PW TI

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SN74ALVCH374PWLE TI

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SN74ALVCH374PWRE4 TI

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 		ALVC/VCX/A SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20, GREEN, PLASTIC, TSSOP-20
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 		16-BIT TO 32-BIT REGISTERED BUS EXCHANGER WITH BYTE MASKS AND 3-STATE OUTPUTS

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