Datasheet > SN74ALVC08_07

SN74ALVC08_07

更新时间： 2024-11-20 05:24:55

品牌	Logo	应用领域
德州仪器 - TI		输入元件
页数	文件大小	规格书
16页	727K
描述
QUADRUPLE 2-INPUT POSITIVE-AND GATE

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SN74ALVC08_07 数据手册

SN74ALVC08

QUADRUPLE 2-INPUT POSITIVE-AND GATE

www.ti.com

SCES101I–JULY 1997–REVISED OCTOBER 2004

FEATURES

D, DGV, NS, OR PW PACKAGE

(TOP VIEW)

•

Operates From 1.65 V to 3.6 V

Max t_pdof 2.9 ns at 3.3 V

±24-mA Output Drive at 3.3 V

Latch-Up Performance Exceeds 250 mA Per

JESD 17

•

ESD Protection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)

– 200-V Machine Model (A115-A)

GND

– 1000-V Charged-Device Model (C101)

RGY PACKAGE

(TOP VIEW)

DESCRIPTION/ORDERING INFORMATION

This quadruple 2-input positive-AND gate is designed

for 1.65-V to 3.6-V V_CCoperation.

The device performs the Boolean function Y = A · B

13 4B

A + B

or Y =

in positive logic.

ORDERING INFORMATION

T_A

PACKAGE⁽¹⁾

ORDERABLE PART NUMBER

SN74ALVC08RGYR

SN74ALVC08D

TOP-SIDE MARKING

VA08

QFN - RGY

SOIC - D

Tape and reel

Tube

ALVC08

Tape and reel

SN74ALVC08DR

-40°C to 85°C

SOP - NS

SN74ALVC08NSR

ALVC08

VA08

TSSOP - PW

TVSOP - DGV

SN74ALVC08PWR

SN74ALVC08DGVR

VA08

(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at

www.ti.com/sc/package.

FUNCTION TABLE

(each gate)

INPUTS

OUTPUT

LOGIC DIAGRAM, EACH GATE (POSITIVE LOGIC)

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

12 3 4 5 6 7...16

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