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SN74ALVC08DR PDF预览

SN74ALVC08DR

更新时间: 2024-11-20 05:24:55
品牌 Logo 应用领域
德州仪器 - TI 栅极触发器逻辑集成电路光电二极管输入元件
页数 文件大小 规格书
14页 576K
描述
QUADRUPLE 2-INPUT POSITIVE-AND GATE

SN74ALVC08DR 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Active零件包装代码:SOIC
包装说明:SOIC-14针数:14
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:0.8Is Samacsys:N
系列:ALVC/VCX/AJESD-30 代码:R-PDSO-G14
JESD-609代码:e4长度:8.65 mm
负载电容(CL):50 pF逻辑集成电路类型:AND GATE
最大I(ol):0.024 A湿度敏感等级:1
功能数量:4输入次数:2
端子数量:14最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP14,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:TR峰值回流温度(摄氏度):260
电源:3.3 V最大电源电流(ICC):0.01 mA
Prop。Delay @ Nom-Sup:2.9 ns传播延迟(tpd):5.3 ns
认证状态:Not Qualified施密特触发器:NO
座面最大高度:1.75 mm子类别:Gates
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):1.65 V
标称供电电压 (Vsup):1.8 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:3.91 mm
Base Number Matches:1

SN74ALVC08DR 数据手册

 浏览型号SN74ALVC08DR的Datasheet PDF文件第2页浏览型号SN74ALVC08DR的Datasheet PDF文件第3页浏览型号SN74ALVC08DR的Datasheet PDF文件第4页浏览型号SN74ALVC08DR的Datasheet PDF文件第5页浏览型号SN74ALVC08DR的Datasheet PDF文件第6页浏览型号SN74ALVC08DR的Datasheet PDF文件第7页 
SN74ALVC08  
QUADRUPLE 2-INPUT POSITIVE-AND GATE  
www.ti.com  
SCES101IJULY 1997REVISED OCTOBER 2004  
FEATURES  
D, DGV, NS, OR PW PACKAGE  
(TOP VIEW)  
Operates From 1.65 V to 3.6 V  
Max tpd of 2.9 ns at 3.3 V  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
1A  
1B  
V
CC  
±24-mA Output Drive at 3.3 V  
4B  
4A  
4Y  
3B  
3A  
3Y  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
1Y  
2A  
2B  
2Y  
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
8
GND  
– 1000-V Charged-Device Model (C101)  
RGY PACKAGE  
(TOP VIEW)  
DESCRIPTION/ORDERING INFORMATION  
This quadruple 2-input positive-AND gate is designed  
for 1.65-V to 3.6-V VCC operation.  
1
14  
The device performs the Boolean function Y = A · B  
1B  
13 4B  
2
3
4
5
6
A + B  
or Y =  
in positive logic.  
12  
11  
10  
9
1Y  
2A  
2B  
2Y  
4A  
4Y  
3B  
3A  
7
8
ORDERING INFORMATION  
TA  
PACKAGE(1)  
ORDERABLE PART NUMBER  
SN74ALVC08RGYR  
SN74ALVC08D  
TOP-SIDE MARKING  
VA08  
QFN - RGY  
SOIC - D  
Tape and reel  
Tube  
ALVC08  
Tape and reel  
Tape and reel  
Tape and reel  
Tape and reel  
SN74ALVC08DR  
-40°C to 85°C  
SOP - NS  
SN74ALVC08NSR  
ALVC08  
VA08  
TSSOP - PW  
TVSOP - DGV  
SN74ALVC08PWR  
SN74ALVC08DGVR  
VA08  
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
FUNCTION TABLE  
(each gate)  
INPUTS  
OUTPUT  
Y
A
H
L
B
H
X
L
H
L
L
X
LOGIC DIAGRAM, EACH GATE (POSITIVE LOGIC)  
A
Y
B
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 1997–2004, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  

SN74ALVC08DR 替代型号

型号 品牌 替代类型 描述 数据表
SN74ALVC08IDREP TI

完全替代

Enhanced Product Quadruple 2-Input Positive-And Gate 14-SOIC -40 to 85
V62/04686-01XE TI

完全替代

QUADRUPLE 2-INPUT POSITIVE-AND GATE
SN74ALVC08D TI

完全替代

QUADRUPLE 2-INPUT POSITIVE-AND GATE

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