5秒后页面跳转
捷配首页

Datasheet > SN74ALS845NT
SN74ALS845NT PDF预览

SN74ALS845NT

更新时间： 2024-11-29 23:06:15
品牌 Logo 应用领域
德州仪器 - TI 锁存器输出元件
页数 文件大小 规格书
6页 95K
描述
8-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS

阅读下载

中文翻译

获取价格

SN74ALS845NT 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Obsolete零件包装代码：DIP
包装说明：DIP, DIP24,.3针数：24
Reach Compliance Code：not_compliantHTS代码：8542.39.00.01
Factory Lead Time：1 week风险等级：5.68
其他特性：WITH TRIPLE OUTPUT ENABLE; WITH CLEAR AND PRESET系列：ALS
JESD-30 代码：R-PDIP-T24长度：31.64 mm
负载电容（CL）：50 pF逻辑集成电路类型：BUS DRIVER
最大I（ol）：0.024 A位数：8
功能数量：1端口数量：2
端子数量：24最高工作温度：70 °C
最低工作温度：输出特性：3-STATE
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：DIP封装等效代码：DIP24,.3
封装形状：RECTANGULAR封装形式：IN-LINE
峰值回流温度（摄氏度）：NOT SPECIFIED最大电源电流（ICC）：67 mA
传播延迟（tpd）：26 ns认证状态：Not Qualified
座面最大高度：5.08 mm子类别：FF/Latches
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：4.5 V
标称供电电压 (Vsup)：5 V表面贴装：NO
技术：TTL温度等级：COMMERCIAL
端子形式：THROUGH-HOLE端子节距：2.54 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：7.62 mm

SN74ALS845NT 数据手册

 浏览型号SN74ALS845NT的Datasheet PDF文件第2页浏览型号SN74ALS845NT的Datasheet PDF文件第3页浏览型号SN74ALS845NT的Datasheet PDF文件第4页浏览型号SN74ALS845NT的Datasheet PDF文件第5页浏览型号SN74ALS845NT的Datasheet PDF文件第6页 
SN74ALS845  
8-BIT BUS-INTERFACE D-TYPE LATCH  
WITH 3-STATE OUTPUTS  
SDAS233A – DECEMBER 1983 – REVISED JANUARY 1995  
DW OR NT PACKAGE  
(TOP VIEW)  
• 3-State Buffer-Type Outputs Drive Bus  
Lines Directly  
• Bus-Structured Pinout  
• Provides Extra Bus-Driving Latches  
Necessary for Wider Address/Data Paths or  
Buses With Parity  
OE1  
OE2  
1D  
2D  
3D  
4D  
5D  
6D  
7D  
V
CC  
1
2
3
4
5
6
7
8
9
24  
23 OE3  
22 1Q  
21 2Q  
20 3Q  
19 4Q  
18 5Q  
17 6Q  
16 7Q  
15 8Q  
14 PRE  
13 LE  
• Buffered Control Inputs to Reduce  
dc Loading Effects  
• Power-Up High-Impedance State  
• Package Options Include Plastic  
Small-Outline (DW) Packages and Standard  
Plastic (NT) 300-mil DIPs  
8D 10  
CLR 11  
GND 12  
description  
This 8-bit latch features 3-state outputs designed  
specifically for driving highly capacitive or relatively low-impedance loads. This device is particularly suitable  
for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.  
The eight latches are transparent D-type latches. The device has noninverting data (D) inputs and provides true  
data at its outputs.  
Because the clear (CLR) and preset (PRE) inputs are independent of the clock (CLK) input, taking CLR low  
causes the eight Q outputs to go low. Taking PRE low causes the eight Q outputs to go high. When both PRE  
and CLR are taken low, the outputs follow the preset condition.  
The buffered output-enable (OE1, OE2, and OE3) inputs can be used to place the eight outputs in either a  
normal logic state (high or low levels) or a high-impedance state. In the high-impedance state, the outputs  
neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the  
capability to drive bus lines without interface or pullup components.  
The output enables do not affect the internal operation of the latches. Previously stored data can be retained  
or new data can be entered while the outputs are in the high-impedance state.  
The -1 version of the SN74ALS845 is identical to the standard version, except that the recommended maximum  
I
for the -1 version is increased to 48 mA.  
OL  
The SN74ALS845 is characterized for operation from 0°C to 70°C.  
FUNCTION TABLE  
INPUTS  
OUTPUT  
Q
PRE  
L
CLR  
X
OE1  
L
OE2  
L
OE3  
L
LE  
X
D
X
X
L
H
L
H
L
L
L
L
X
H
H
L
L
L
H
H
L
L
H
H
L
L
L
H
L
H
H
H
L
L
L
Q
0
X
X
X
X
H
X
X
X
X
X
Z
X
X
X
H
X
X
Z
Z
X
X
H
X
X
Copyright 1995, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
123456

中文翻译

下载PDF

与SN74ALS845NT相关器件

型号 品牌 获取价格 描述 数据表
SN74ALS845NT1 TI

获取价格

 		IC,LATCH,SINGLE,8-BIT,ALS-TTL,DIP,24PIN,PLASTIC
SN74ALS845NT-10 TI

获取价格

 		ALS SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDIP24
SN74ALS845NT3 TI

获取价格

 		8-Bit Bus-Interface D-Type Latches With 3-State Outputs 24-PDIP 0 to 70
SN74ALS845NTP1 TI

获取价格

 		IC,LATCH,SINGLE,8-BIT,ALS-TTL,DIP,24PIN,PLASTIC
SN74ALS845NTP3 TI

获取价格

 		IC IC,LATCH,SINGLE,8-BIT,ALS-TTL,DIP,24PIN,PLASTIC, FF/Latch
SN74ALS846-1DW TI

获取价格

 		ALS SERIES, 8-BIT DRIVER, INVERTED OUTPUT, PDSO24
SN74ALS846-1DWP3 TI

获取价格

 		IC,LATCH,SINGLE,8-BIT,ALS-TTL,SOP,24PIN,PLASTIC
SN74ALS846-1FN3 TI

获取价格

 		ALS SERIES, 8-BIT DRIVER, INVERTED OUTPUT, PQCC28
SN74ALS846DW TI

获取价格

 		ALS SERIES, 8-BIT DRIVER, INVERTED OUTPUT, PDSO24
SN74ALS846DW3 TI

获取价格

 		IC,LATCH,SINGLE,8-BIT,ALS-TTL,SOP,24PIN,PLASTIC

与SN74ALS845NT相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证