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SN74ALS253FN-00 PDF预览

SN74ALS253FN-00

更新时间: 2024-11-04 15:52:07
品牌 Logo 应用领域
德州仪器 - TI 输出元件逻辑集成电路
页数 文件大小 规格书
19页 866K
描述
ALS SERIES, DUAL 4 LINE TO 1 LINE MULTIPLEXER, TRUE OUTPUT, PQCC20

SN74ALS253FN-00 技术参数

生命周期:Obsolete包装说明:QCCJ,
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.69系列:ALS
JESD-30 代码:S-PQCC-J20长度:8.9662 mm
负载电容(CL):50 pF逻辑集成电路类型:MULTIPLEXER
功能数量:2输入次数:4
输出次数:1端子数量:20
最高工作温度:70 °C最低工作温度:
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:QCCJ
封装形状:SQUARE封装形式:CHIP CARRIER
最大电源电流(ICC):12 mA传播延迟(tpd):21 ns
认证状态:Not Qualified座面最大高度:4.57 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:TTL温度等级:COMMERCIAL
端子形式:J BEND端子节距:1.27 mm
端子位置:QUAD宽度:8.9662 mm
Base Number Matches:1

SN74ALS253FN-00 数据手册

 浏览型号SN74ALS253FN-00的Datasheet PDF文件第2页浏览型号SN74ALS253FN-00的Datasheet PDF文件第3页浏览型号SN74ALS253FN-00的Datasheet PDF文件第4页浏览型号SN74ALS253FN-00的Datasheet PDF文件第5页浏览型号SN74ALS253FN-00的Datasheet PDF文件第6页浏览型号SN74ALS253FN-00的Datasheet PDF文件第7页 
ꢀꢁ ꢂꢃ ꢄꢅ ꢀ ꢆꢂ ꢇ ꢈ ꢉꢀ ꢁꢊ ꢃꢄꢅ ꢀ ꢆ ꢂ ꢇ ꢈꢉꢀ ꢁꢊꢃ ꢄ ꢀꢆ ꢂꢇ ꢄ  
ꢋꢌꢄ ꢅꢉꢍ ꢎꢏ ꢐ ꢎꢃ ꢉꢋ ꢄꢑꢄꢉꢀ ꢒꢅ ꢒꢓꢑꢏ ꢔꢀꢕ ꢖꢌ ꢅꢑ ꢗꢘ ꢅꢒ ꢙꢒ ꢔ ꢀ  
ꢚ ꢗꢑ ꢛꢉ ꢇ ꢎꢀꢑꢄꢑ ꢒꢉ ꢏꢌ ꢑꢘ ꢌꢑ ꢀ  
SDAS216A − APRIL 1982 − REVISED DECEMBER 1994  
SN54ALS253 . . . J PACKAGE  
SN74ALS253, SN74AS253A . . . D OR N PACKAGE  
(TOP VIEW)  
3-State Versions of the ALS153 and  
SN74AS153  
Permits Multiplexing From n Lines to  
One Line  
1OE  
B
V
CC  
2OE  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
Performs Parallel-to-Serial Conversion  
Package Options Include Plastic  
Small-Outline (D) Packages, Ceramic Chip  
Carriers (FK), and Standard Plastic (N) and  
Ceramic (J) 300-mil DIPs  
1C3  
1C2  
1C1  
1C0  
1Y  
A
2C3  
2C2  
2C1  
2C0  
2Y  
description  
GND  
These data selectors/multiplexers contain  
inverters and drivers to supply full binary decoding  
data selection to the AND-OR gates. Separate  
output control inputs are provided for each of the  
two 4-line sections.  
SN54ALS253 . . . FK PACKAGE  
(TOP VIEW)  
The 3-state outputs can interface with and drive  
data lines of bus-organized systems. With all but  
one of the common outputs disabled (at a  
high-impedance state), the low impedance of the  
single enabled output drives the bus line to a high  
or low logic level. Each output has its own  
output-enable (OE) input. The output is disabled  
when OE is high.  
3
2
1
20 19  
18  
1C3  
1C2  
NC  
A
4
5
6
7
8
17  
16  
15  
14  
2C3  
NC  
2C2  
2C1  
1C1  
1C0  
9 10 11 12 13  
The SN54ALS253 is characterized for operation  
over the full military temperature range of 55°C  
to 125°C. The SN74ALS253 and SN74AS253A  
are characterized for operation from 0°C to 70°C.  
NC − No internal connection  
FUNCTION TABLE  
INPUTS  
OUTPUT  
SELECT  
DATA  
Y
OE  
B
X
L
A
X
L
C0  
X
L
C1  
X
X
X
L
C2  
X
X
X
X
X
L
C3  
X
X
X
X
X
X
X
L
H
L
L
L
L
L
L
L
L
Z
L
L
L
H
X
X
X
X
X
X
H
L
L
H
H
L
L
H
X
X
X
X
H
L
H
H
H
H
L
H
X
X
H
L
H
H
H
H
Select inputs A and B are common to both sections.  
ꢑꢧ  
Copyright 1994, Texas Instruments Incorporated  
ꢣ ꢧ ꢤ ꢣꢜ ꢝꢱ ꢟꢞ ꢢ ꢪꢪ ꢨꢢ ꢠ ꢢ ꢡ ꢧ ꢣ ꢧ ꢠ ꢤ ꢬ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443  

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