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SN74ALS251DRE4 PDF预览

SN74ALS251DRE4

更新时间: 2024-11-23 15:52:07
品牌 Logo 应用领域
德州仪器 - TI 光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
18页 851K
描述
ALS SERIES, 8 LINE TO 1 LINE MULTIPLEXER, COMPLEMENTARY OUTPUT, PDSO16, GREEN, PLASTIC, SO-16

SN74ALS251DRE4 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP, SOP16,.25针数:16
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.44系列:ALS
JESD-30 代码:R-PDSO-G16JESD-609代码:e4
长度:9.9 mm负载电容(CL):50 pF
逻辑集成电路类型:MULTIPLEXER最大I(ol):0.024 A
湿度敏感等级:1功能数量:1
输入次数:8输出次数:1
端子数量:16最高工作温度:70 °C
最低工作温度:输出特性:3-STATE
输出极性:COMPLEMENTARY封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP16,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
电源:5 V最大电源电流(ICC):10 mA
Prop。Delay @ Nom-Sup:24 ns传播延迟(tpd):24 ns
认证状态:Not Qualified座面最大高度:1.75 mm
子类别:Multiplexer/Demultiplexers最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:TTL
温度等级:COMMERCIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3.9 mmBase Number Matches:1

SN74ALS251DRE4 数据手册

 浏览型号SN74ALS251DRE4的Datasheet PDF文件第2页浏览型号SN74ALS251DRE4的Datasheet PDF文件第3页浏览型号SN74ALS251DRE4的Datasheet PDF文件第4页浏览型号SN74ALS251DRE4的Datasheet PDF文件第5页浏览型号SN74ALS251DRE4的Datasheet PDF文件第6页浏览型号SN74ALS251DRE4的Datasheet PDF文件第7页 
ꢇ ꢋꢌ ꢍꢋ ꢎꢉ ꢏꢄꢐꢄꢉꢀ ꢑꢅ ꢑꢒꢐꢌ ꢓꢀꢔ ꢕꢖ ꢅꢐ ꢗꢘ ꢅꢑ ꢙꢑ ꢓ  
SDAS215A − APRIL 1982 − REVISED DECEMBER 1994  
SN54ALS251 . . . J PACKAGE  
SN74ALS251 . . . D OR N PACKAGE  
(TOP VIEW)  
3-State Version of the ALS151  
3-State Outputs Interface Directly With  
System Bus  
Perform Parallel-to-Serial Conversion  
D3  
D2  
D1  
D0  
Y
W
OE  
GND  
V
CC  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
Complementary Outputs Provide True and  
D4  
D5  
D6  
D7  
A
Inverted Data  
Package Options Include Plastic  
Small-Outline (D) Packages, Ceramic Chip  
Carriers (FK), and Standard Plastic (N) and  
Ceramic (J) 300-mil DIPs  
B
C
description  
SN54ALS251 . . . FK PACKAGE  
(TOP VIEW)  
These data selectors/multiplexers contain full  
binary decoding to select one-of-eight data  
sources and feature controlled complementary  
3-state outputs.  
The 3-state outputs can interface with and drive  
data lines of bus-organized systems. With all but  
one of the common outputs disabled (at the  
high-impedance state), the low impedance of the  
signal-enabled output drives the bus line to a high  
or low logic level. Both outputs are controlled by  
the output-enable (OE) input. The outputs are  
disabled when OE is high.  
3
2
1
20 19  
18 D5  
D1  
D0  
NC  
Y
4
5
6
7
8
17  
16  
15  
14  
D6  
NC  
D7  
A
W
9 10 11 12 13  
The SN54ALS251 is characterized for operation  
over the full military temperature range of 55°C  
to 125°C. The SN74ALS251 is characterized for  
operation from 0°C to 70°C.  
NC − No internal connection  
FUNCTION TABLE  
INPUTS  
SELECT  
OUTPUTS  
OE  
C
X
L
B
X
L
A
X
L
Y
W
Z
H
L
L
L
L
L
L
L
L
Z
D0  
D1  
D2  
D3  
D4  
D5  
D6  
D7  
D0  
D1  
D2  
D3  
D4  
D5  
D6  
D7  
L
L
H
L
L
H
H
L
L
H
L
H
H
H
H
L
H
L
H
H
H
D0, D1, . . . D7 = the level of the respective D input  
ꢐꢨ  
Copyright 1994, Texas Instruments Incorporated  
ꢤ ꢨ ꢥ ꢤꢝ ꢞꢲ ꢠꢟ ꢣ ꢫꢫ ꢩꢣ ꢡ ꢣ ꢢ ꢨ ꢤ ꢨ ꢡ ꢥ ꢭ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443  

SN74ALS251DRE4 替代型号

型号 品牌 替代类型 描述 数据表
SN54ALS251J TI

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