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SN74ALS1002AN PDF预览

SN74ALS1002AN

更新时间: 2024-11-03 23:06:15
品牌 Logo 应用领域
德州仪器 - TI 栅极触发器逻辑集成电路光电二极管输入元件
页数 文件大小 规格书
3页 46K
描述
QUADRUPLE 2-INPUT POSITIVE-NOR BUFFERS

SN74ALS1002AN 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:DIP
包装说明:0.300 INCH, PLASTIC, DIP-14针数:14
Reach Compliance Code:not_compliantHTS代码:8542.39.00.01
风险等级:5.82Is Samacsys:N
其他特性:IOH = 2.6MA @ VOH = 2.4V; IOL = 24MA @ VOL = 0.5V系列:ALS
JESD-30 代码:R-PDIP-T14长度:19.305 mm
负载电容(CL):50 pF逻辑集成电路类型:NOR GATE
最大I(ol):0.024 A功能数量:4
输入次数:2端子数量:14
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP14,.3封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V最大电源电流(ICC):9 mA
Prop。Delay @ Nom-Sup:8 ns传播延迟(tpd):8 ns
认证状态:Not Qualified施密特触发器:NO
座面最大高度:5.08 mm子类别:Gates
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:TTL温度等级:COMMERCIAL
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:6.35 mmBase Number Matches:1

SN74ALS1002AN 数据手册

 浏览型号SN74ALS1002AN的Datasheet PDF文件第2页浏览型号SN74ALS1002AN的Datasheet PDF文件第3页 
SN54ALS1002A, SN74ALS1002A  
QUADRUPLE 2-INPUT POSITIVE-NOR BUFFERS  
SDAS238 – D2661, DECEMBER 1983 – REVISED MAY 1986  
Quad Versions of ’ALS805A  
Buffer Version of ’ALS02  
SN54ALS1002A . . . J PACKAGE  
SN74ALS1002A . . . D OR N PACKAGE  
(TOP VIEW)  
Package Options Include Plastic Small  
Outline Packages, Ceramic Chip Carriers,  
and Standard Plastic and Ceramic 300-mil  
DIPs  
1Y  
1A  
1B  
2Y  
2A  
V
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
CC  
4Y  
4B  
4A  
3Y  
3B  
3A  
Dependable Texas Instruments Quality and  
Reliability  
2B  
GND  
description  
8
These devices contain four independent 2-input  
NOR buffers. They perform the Boolean functions  
Y = A + B or Y = AB in positive logic.  
SN54ALS1002A . . . FK PACKAGE  
(TOP VIEW)  
The SN54ALS1002A is characterized for opera-  
tion over the full military temperature range of  
55°C to 125°C. The SN74ALS1002A is  
characterized for operation from 0°C to 70°C.  
3
2
1
20 19  
18  
4B  
NC  
4A  
NC  
3Y  
1B  
NC  
2Y  
4
5
6
7
8
17  
16  
15  
14  
FUNCTION TABLE  
(each gate)  
NC  
2A  
INPUTS  
OUTPUT  
9 10 11 12 13  
A
H
X
L
B
X
H
L
Y
L
L
H
NC – No internal connection  
logic symbol†  
logic diagram (positive logic)  
2
1  
1A  
1B  
1A  
1
1Y  
2Y  
3Y  
4Y  
1Y  
3
1B  
5
4
10  
13  
2A  
2B  
2A  
2Y  
3Y  
4Y  
6
2B  
8
3A  
3A  
3B  
9
3B  
11  
4A  
4A  
4B  
12  
4B  
This symbol is in accordance with ANSI/IEEE Std 91-1984 and  
IEC Publication 617-12.  
Pin numbers shown are for D, J, and N packages.  
Copyright 1986, Texas Instruments Incorporated  
5BASIC  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77001  

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