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SN74ALS03BDRE4 PDF预览

SN74ALS03BDRE4

更新时间: 2024-11-04 21:01:51
品牌 Logo 应用领域
德州仪器 - TI 输入元件光电二极管逻辑集成电路触发器
页数 文件大小 规格书
12页 680K
描述
ALS SERIES, QUAD 2-INPUT NAND GATE, PDSO14, GREEN, PLASTIC, SOIC-14

SN74ALS03BDRE4 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP, SOP14,.25针数:14
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.43系列:ALS
JESD-30 代码:R-PDSO-G14JESD-609代码:e4
长度:8.65 mm负载电容(CL):50 pF
逻辑集成电路类型:NAND GATE最大I(ol):0.008 A
湿度敏感等级:1功能数量:4
输入次数:2端子数量:14
最高工作温度:70 °C最低工作温度:
输出特性:OPEN-COLLECTOR封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP14,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
电源:5 V最大电源电流(ICC):4 mA
Prop。Delay @ Nom-Sup:50 ns传播延迟(tpd):50 ns
认证状态:Not Qualified施密特触发器:NO
座面最大高度:1.75 mm子类别:Gates
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:TTL温度等级:COMMERCIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:3.9 mm
Base Number Matches:1

SN74ALS03BDRE4 数据手册

 浏览型号SN74ALS03BDRE4的Datasheet PDF文件第2页浏览型号SN74ALS03BDRE4的Datasheet PDF文件第3页浏览型号SN74ALS03BDRE4的Datasheet PDF文件第4页浏览型号SN74ALS03BDRE4的Datasheet PDF文件第5页浏览型号SN74ALS03BDRE4的Datasheet PDF文件第6页浏览型号SN74ALS03BDRE4的Datasheet PDF文件第7页 
ꢀꢁ ꢂꢃ ꢄꢅ ꢀ ꢆꢇ ꢈ ꢉꢊ ꢀꢁꢋ ꢃꢄ ꢅꢀ ꢆ ꢇꢈ  
ꢌ ꢍꢄꢎꢏ ꢍꢐꢅ ꢑꢊ ꢒꢓꢔ ꢁꢐꢍ ꢕ ꢊꢐꢖ ꢀ ꢔꢕ ꢔꢗꢑ ꢓꢁꢄꢁ ꢎꢊꢈ ꢍꢘꢘ ꢑꢏ ꢀ  
ꢙ ꢔꢕ ꢚꢊ ꢖꢐ ꢑꢁꢓꢛꢖ ꢅ ꢅ ꢑꢛꢕꢖ ꢏꢊꢖ ꢍꢕ ꢐꢍ ꢕꢀ  
SDAS013B − MARCH 1984 − REVISED DECEMBER 1994  
SN54ALS03B . . . J PACKAGE  
SN74ALS03B . . . D OR N PACKAGE  
(TOP VIEW)  
Package Options Include Plastic  
Small-Outline (D) Packages, Ceramic Chip  
Carriers (FK), and Standard Plastic (N) and  
Ceramic (J) 300-mil DIPs  
1A  
1B  
1Y  
2A  
2B  
V
CC  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
4B  
4A  
4Y  
3B  
3A  
3Y  
description  
These devices contain four independent 2-input  
positive-NAND buffers. They perform the Boolean  
functions Y = A B or Y = A + B in positive logic.  
The open-collector outputs require pullup  
resistors to perform correctly. These outputs may  
be connected to other open-collector outputs to  
implement active-low wired-OR or active-high  
wired-AND functions. Open-collector devices are  
2Y  
GND  
8
SN54ALS03B . . . FK PACKAGE  
(TOP VIEW)  
often used to generate high V  
levels.  
OH  
The SN54ALS03B is characterized for operation  
over the full military temperature range of 55°C  
to 125°C. The SN74ALS03B is characterized for  
operation from 0°C to 70°C.  
3
2
1
20 19  
18  
1Y  
NC  
2A  
4
5
6
7
8
4A  
NC  
4Y  
NC  
3B  
17  
16  
15  
14  
NC  
2B  
FUNCTION TABLE  
(each gate)  
9 10 11 12 13  
INPUTS  
OUTPUT  
Y
A
B
H
X
L
H
L
L
H
H
NC − No internal connection  
X
logic symbol  
logic diagram (positive logic)  
1
1A  
2
1
1A  
2
3
6
&
3
6
1Y  
2Y  
3Y  
4Y  
1Y  
2Y  
3Y  
4Y  
1B  
1B  
4
4
2A  
5
2A  
5
2B  
2B  
9
9
3A  
8
3A  
10  
3B  
12  
4A  
13  
4B  
8
10  
3B  
12  
4A  
11  
11  
13  
4B  
This symbol is in accordance with ANSI/IEEE Std 91-1984 and  
IEC Publication 617-12.  
Pin numbers shown are for the D, J, and N packages.  
ꢕꢧ  
Copyright 1994, Texas Instruments Incorporated  
ꢣ ꢧ ꢤ ꢣꢜ ꢝꢱ ꢟꢞ ꢢ ꢪꢪ ꢨꢢ ꢠ ꢢ ꢡ ꢧ ꢣ ꢧ ꢠ ꢤ ꢬ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443  

SN74ALS03BDRE4 替代型号

型号 品牌 替代类型 描述 数据表
SN74ALS03BDR TI

完全替代

Quadruple 2-Input Positive-NAND Buffer With Open-Collector Outputs 14-SOIC 0 to 70

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