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SN74AHCT138 PDF预览

SN74AHCT138

更新时间： 2024-11-19 23:09:43
品牌 Logo 应用领域
德州仪器 - TI 解码器解复用器
页数 文件大小 规格书
9页 127K
描述
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS

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SN74AHCT138 数据手册

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SN54AHCT138, SN74AHCT138  
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS  
SCLS266J – DECEMBER 1995 – REVISED JANUARY 2000  
SN54AHCT138 . . . J OR W PACKAGE  
SN74AHCT138 . . . D, DB, DGV, N, OR PW PACKAGE  
(TOP VIEW)  
EPIC (Enhanced-Performance Implanted  
CMOS) Process  
Inputs Are TTL-Voltage Compatible  
A
B
V
CC  
15 Y0  
Designed Specifically for High-Speed  
Memory Decoders and Data-Transmission  
Systems  
1
2
3
4
5
6
7
8
16  
14  
13  
12  
11  
10  
9
C
Y1  
Y2  
Y3  
Y4  
Y5  
Y6  
G2A  
G2B  
G1  
Incorporate Three Enable Inputs to Simplify  
Cascading and/or Data Reception  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
Y7  
GND  
ESD Protection Exceeds 2000 V Per  
MIL-STD-833, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
SN54AHCT138 . . . FK PACKAGE  
(TOP VIEW)  
Package Options Include Plastic  
Small-Outline (D), Shrink Small-Outline  
(DB), Thin Very Small-Outline (DGV), Thin  
Shrink Small-Outline (PW), and Ceramic  
Flat (W) Packages, Ceramic Chip Carriers  
(FK), and Standard Plastic (N) and Ceramic  
(J) DIPs  
3
2
1
20 19  
18  
Y1  
C
G2A  
NC  
4
5
6
7
8
17 Y2  
16  
NC  
15  
Y3  
G2B  
G1  
description  
14  
Y4  
9 10 11 12 13  
The ’AHCT138 3-line to 8-line decoders/  
demultiplexers are designed to be used in  
high-performance  
memory-decoding  
and  
NC – No internal connection  
data-routing applications that require very short  
propagation-delay times. In high-performance  
memory systems, this decoder can be used to  
minimize the effects of system decoding. When  
employed with high-speed memories utilizing a  
fast enable circuit, the delay times of this decoder  
and the enable time of the memory usually are  
less than the typical access time of the memory.  
This means that the effective system delay  
introduced by the decoder is negligible.  
The conditions at the binary-select inputs and the three enable inputs select one of eight output lines. Two  
active-low and one active-high enable inputs reduce the need for external gates or inverters when expanding.  
A 24-line decoder can be implemented without external inverters and a 32-line decoder requires only one  
inverter. An enable input can be used as a data input for demultiplexing applications.  
The SN54AHCT138 is characterized for operation over the full military temperature range of –55°C to 125°C.  
The SN74AHCT138 is characterized for operation from –40°C to 85°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC is a trademark of Texas Instruments Incorporated.  
Copyright 2000, Texas Instruments Incorporated  
On products compliant to MIL-PRF-38535, all parameters are tested  
unless otherwise noted. On all other products, production  
processing does not necessarily include testing of all parameters.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...9

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SN74AHCT138 替代型号

型号 品牌 替代类型 描述 数据表
SN54AHCT138 TI

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