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SN74AC16244DGGR PDF预览

SN74AC16244DGGR

更新时间: 2024-11-18 15:52:03
品牌 Logo 应用领域
德州仪器 - TI 驱动光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
12页 358K
描述
AC SERIES, QUAD 4-BIT DRIVER, TRUE OUTPUT, PDSO48, TSSOP-48

SN74AC16244DGGR 技术参数

生命周期:Obsolete零件包装代码:TSSOP
包装说明:TSSOP,针数:48
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.63系列:AC
JESD-30 代码:R-PDSO-G48长度:12.5 mm
逻辑集成电路类型:BUS DRIVER位数:4
功能数量:4端口数量:2
端子数量:48最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH传播延迟(tpd):11.8 ns
认证状态:Not Qualified座面最大高度:1.2 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL宽度:6.1 mm
Base Number Matches:1

SN74AC16244DGGR 数据手册

 浏览型号SN74AC16244DGGR的Datasheet PDF文件第2页浏览型号SN74AC16244DGGR的Datasheet PDF文件第3页浏览型号SN74AC16244DGGR的Datasheet PDF文件第4页浏览型号SN74AC16244DGGR的Datasheet PDF文件第5页浏览型号SN74AC16244DGGR的Datasheet PDF文件第6页浏览型号SN74AC16244DGGR的Datasheet PDF文件第7页 
54AC16244, 74AC16244  
16-BIT BUFFERS/LINE DRIVERS  
WITH 3-STATE OUTPUTS  
SCAS120A – MARCH 1990 – REVISED APRIL 1996  
54AC16244 . . . WD PACKAGE  
74AC16244 . . . DGG OR DL PACKAGE  
(TOP VIEW)  
Members of the Texas Instruments  
Widebus Family  
3-State Outputs Drive Bus Lines or Buffer  
Memory Address Registers  
1OE  
1Y1  
1Y2  
GND  
1Y3  
1Y4  
2OE  
1A1  
1A2  
GND  
1A3  
1A4  
1
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
Flow-Through Architecture Optimizes PCB  
Layout  
2
3
4
Distributed V  
Minimizes High-Speed Switching Noise  
and GND Configuration  
CC  
5
6
EPIC (Enhanced-Performance Implanted  
CMOS) 1- m Process  
V
V
7
CC  
CC  
2A1  
2A2  
GND  
2A3  
2A4  
3A1  
3A2  
GND  
3A3  
3A4  
2Y1  
2Y2  
8
500-mA Typical Latch-Up Immunity at  
125°C  
9
GND  
2Y3  
10  
11  
Package Options Include Plastic 300-mil  
Shrink Small-Outline (DL) and Thin Shrink  
Small-Outline (DGG) Packages Using 25-mil  
Center-to-Center Pin Spacings, and 380-mil  
Fine-Pitch Ceramic Flat (WD) Packages  
Using 25-mil Center-to-Center Pin Spacings  
2Y4 12  
3Y1 13  
3Y2 14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
GND  
3Y3  
3Y4  
description  
V
V
CC  
CC  
4A1  
4A2  
4Y1  
4Y2  
The ’AC16244 are 16-bit buffers/line drivers  
designed specifically to improve both the  
performance and density of 3-state memory  
address drivers, clock drivers, and bus-oriented  
receivers and transmitters. They can be used as  
four 4-bit buffers, two 8-bit buffers, or one 16-bit  
buffer. These devices provide true outputs and  
symmetrical active-low output-enable (OE)  
inputs. When OE is low, the device passes  
noninverted data from the A inputs to the Y  
outputs. When OE is high, the outputs are in the  
high-impedance state.  
28 GND  
27 4A3  
26 4A4  
25 3OE  
GND  
4Y3  
4Y4  
4OE  
The 74AC16244 is packaged in the TI’s shrink small-outline package, which provides twice the I/O pin count  
and functionality of standard small-outline packages in the same printed-circuit-board area.  
The 54AC16244 is characterized for operation over the full military temperature range of –55°C to 125°C. The  
74AC16244 is characterized for operation from –40°C to 85°C.  
FUNCTION TABLE  
(each driver)  
INPUTS  
OUTPUT  
Y
OE  
A
H
L
L
L
H
L
H
X
Z
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC and Widebus are trademarks of Texas Instruments Incorporated.  
Copyright 1996, Texas Instruments Incorporated  
UNLESS OTHERWISE NOTED this document contains PRODUCTION  
DATA information current as of publication date. Products conform to  
specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all  
parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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