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SN65MLVD047AAD PDF预览

SN65MLVD047AAD

更新时间： 2024-01-06 18:15:06
品牌 Logo 应用领域
德州仪器 - TI 驱动光电二极管接口集成电路驱动器
页数 文件大小 规格书
21页 698K
描述
QUAD LINE DRIVER, PDSO16, PLASTIC, MS-012AC, SOIC-16

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SN65MLVD047AAD 技术参数

生命周期：Obsolete零件包装代码：SOIC
包装说明：SOP, SOP16,.25针数：16
Reach Compliance Code：unknownECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.68
差分输出：YES驱动器位数：4
高电平输入电流最大值：0.00001 A输入特性：STANDARD
接口集成电路类型：LINE DRIVER接口标准：EIA-899; TIA-899
JESD-30 代码：R-PDSO-G16长度：9.9 mm
功能数量：4端子数量：16
最高工作温度：85 °C最低工作温度：-40 °C
最小输出摆幅：0.48 V封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装等效代码：SOP16,.25
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
电源：3.3 V认证状态：Not Qualified
最大接收延迟：座面最大高度：1.75 mm
子类别：Line Driver or Receivers最大供电电压：3.6 V
最小供电电压：3 V标称供电电压：3.3 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
最大传输延迟：2.4 ns宽度：3.9 mm
Base Number Matches：1

SN65MLVD047AAD 数据手册

 浏览型号SN65MLVD047AAD的Datasheet PDF文件第2页浏览型号SN65MLVD047AAD的Datasheet PDF文件第3页浏览型号SN65MLVD047AAD的Datasheet PDF文件第4页浏览型号SN65MLVD047AAD的Datasheet PDF文件第5页浏览型号SN65MLVD047AAD的Datasheet PDF文件第6页浏览型号SN65MLVD047AAD的Datasheet PDF文件第7页 
SN65MLVD047  
www.ti.com  
SLLS606A–MARCH 2004–REVISED JULY 2005  
MULTIPOINT-LVDS QUAD DIFFERENTIAL LINE DRIVER  
FEATURES  
DESCRIPTION  
•
Differential Line Drivers for 30-Ω to 55-Ω  
Loads and Data Rates(1) Up to 200 Mbps,  
Clock Frequencies up to 100 MHz  
The SN65MLVD047 is a quadruple line driver. The  
output current of this device has been increased, in  
comparison to standard LVDS compliant devices, in  
order to support doubly terminated transmission lines  
and heavily loaded backplane bus applications.  
Backplane applications generally require impedance  
matching termination resistors at both ends of the  
bus. The effective impedance of a doubly terminated  
bus can be as low as 30 Ω due to the bus  
terminations, as well as the capacitive load of bus  
interface devices. SN65MLVD047 drivers allow for  
operation with loads as low as 30 Ω. The  
SN65MLVD047 devices allow for multiple drivers to  
be present on a single bus. Driver edge rate control is  
•
•
•
Supports Multipoint Bus Architectures  
Operates from a Single 3.3-V Supply  
Characterized for Operation from –40°C to  
85°C  
•
16-Pin SOIC (JEDEC MS-012) and 16-Pin  
TSSOP (JEDEC MS-153) Packaging  
APPLICATIONS  
•
Clock Distribution  
•
Backplane or Cabled Multipoint Data Trans-  
mission in Telecommunications, Automotive,  
Industrial, and Other Computer Systems  
incorporated  
to  
support  
operation.  
The  
SN65MLVD047 provides 9-kV ESD protection on all  
bus pins.  
•
•
•
•
Cellular Base Stations  
Central-Office and PBX Switching  
Bridges and Routers  
Low-Power High-Speed Short-Reach Alterna-  
tive to TIA/EIA-485(1)  
(1) The data rate of a line is the number of voltage transitions that  
are made per second expressed in the units bps (bits per  
second).  
LOGIC DIAGRAM (POSITIVE LOGIC)  
EN  
EN  
1 Y  
1 Z  
1A  
2A  
2 Y  
2 Z  
3 Y  
3 Z  
3A  
4A  
4 Y  
4 Z  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2004–2005, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
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SN65MLVD047APWR TI

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SN65MLVD047APWRG4 TI

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 		MULTIPOINT-LVDS QUAD DIFFERENTIAL LINE DRIVER
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 		MULTIPOINT-LVDS QUAD DIFFERENTIAL LINE DRIVER
SN65MLVD047DG4 TI

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 		MULTIPOINT-LVDS QUAD DIFFERENTIAL LINE DRIVER
SN65MLVD047DR TI

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 		MULTIPOINT-LVDS QUAD DIFFERENTIAL LINE DRIVER

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