Datasheet > 驱动程序和接口 > 线路驱动器或接收器> SN65MLVD080

SN65MLVD080

更新时间： 2024-09-12 22:29:03

品牌	Logo	应用领域
德州仪器 - TI		/
页数	文件大小	规格书
24页	237K
描述
8 CHANNEL HALF DUPLEX M LVDS LINE TRANSCEIVERS

阅读下载

中文翻译

获取价格

数据手册
替代型号

如果您发现信息不准确，欢迎纠错

SN65MLVD080 数据手册

ꢀꢁ ꢂꢃ ꢄꢅꢆ ꢇꢈ ꢉꢈ

ꢀꢁ ꢂꢃ ꢄꢅꢆ ꢇꢈ ꢉꢊ

www.ti.com

SLLS581A − SEPTEMBER 2003 − REVISED SEPTEMBER 2003

ꢉ

ꢋ

ꢌ

ꢍ

ꢎ

ꢁ

ꢏ

ꢅ

ꢍ

ꢎ

ꢅ

ꢐ

ꢋ

ꢇ

ꢑ

ꢒ

ꢅ

ꢏ

ꢓ

ꢄ

ꢋ

ꢅ

ꢆ

ꢇ

ꢀ

ꢅ

ꢔ

ꢁ

ꢏ

ꢕ

ꢖ

ꢎ

ꢁ

ꢀ

ꢌ

ꢏ

ꢔ

ꢆ

ꢏ

ꢖ

ꢀ

multipoint buses presenting loads as low as 30-Ω and

incorporates controlled transition times to allow for stubs

off of the backbone transmission line.

FEATURES

Low-Voltage Differential 30-Ω to 55-Ω Line

Drivers and Receivers for Signaling Rates

(1)

The M-LVDS standard defines two types of receivers,

designated as Type-1 and Type-2. Type-1 receivers

(SN65MLVD080) have thresholds centered about zero

with 25 mV of hysteresis to prevent output oscillations with

loss of input; Type-2 receivers (SN65MLVD082)

implement a failsafe by using an offset threshold. In

addition, the driver rise and fall times are between 1 and

2.0 ns, complying with the M-LVDS standard to provide

operation at 250 Mbps while also accommodating stubs on

the bus. Receiver outputs are slew rate controlled to

reduce EMI and crosstalk effects associated with large

current surges. The M-LVDS standard allows for 32 nodes

on the bus providing a high-speed replacement for RS-485

where lower common-mode can be tolerated or when

higher signaling rates are needed.

Up to 250 Mbps; Clock Frequencies Up to 125

MHz

Meets or Exceeds the M-LVDS Standard

TIA/EIA-899 for Multipoint Data Interchange

Power Up/Down Glitch Free

Controlled Driver Output Voltage Transition

Times for Improved Signal Quality

−1 V to 3.4 V Common-Mode Voltage Range

Allows Data Transfer With 2 V of Ground

Noise

Bus Pins High Impedance When Driver

Disabled or V

≤ 1.5 V

Independent Enables for each Driver

Bus Pin ESD Protection Exceeds 8 kV

Packaged in 64-Pin TSSOP (DGG)

The driver logic inputs and the receiver logic outputs are

on separate pins rather than tied together as in some

transceiver designs. The drivers have separate enables

(DE) and the receivers are enabled globally through (RE).

This arrangement of separate logic inputs, logic outputs,

and enable pins allows for a listen-while-talking operation.

The devices are characterized for operation from −40°C to

85°C.

APPLICATIONS

Parallel Multipoint Data and Clock

Transmission Via Backplanes and Cables

Low-Power High-Speed Short-Reach

Alternative to TIA/EIA-485

LOGIC DIAGRAM (POSITIVE LOGIC)

SN65MLVD080, SN65MLVD082

Channel 1

1DE

Cellular Base Stations

Central-Office Switches

Network Switches and Routers

DESCRIPTION

The SN65MLVD080 and SN65MLVD082 provide eight

half-duplex transceivers for transmitting and receiving

Multipoint-Low-Voltage Differential Signals in full

compliance with the TIA/EIA-899 (M-LVDS) standard,

which are optimized to operate at signaling rates up to 250

Mbps. The driver outputs have been designed to support

2DE − 8DE

2A − 8A

2B − 8B

2D − 8D

2R − 8R

Channels 2 − 8

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments

semiconductor products and disclaimers thereto appears at the end of this data sheet.

(1)

The signaling rate of a line, is the number of voltage transitions that are made per second expressed in the units bps (bits per second).

ꢒꢖ ꢗ ꢇꢑ ꢌ ꢕꢔ ꢗꢁ ꢇ ꢎꢕꢎ ꢘꢙ ꢚꢛ ꢜ ꢝꢞ ꢟꢘꢛꢙ ꢘꢠ ꢡꢢ ꢜ ꢜ ꢣꢙꢟ ꢞꢠ ꢛꢚ ꢤꢢꢥ ꢦꢘꢡ ꢞꢟꢘ ꢛꢙ ꢧꢞ ꢟꢣꢨ ꢒꢜ ꢛꢧꢢ ꢡꢟꢠ

ꢡ ꢛꢙ ꢚꢛꢜ ꢝ ꢟꢛ ꢠ ꢤꢣ ꢡ ꢘ ꢚꢘ ꢡ ꢞ ꢟꢘ ꢛꢙꢠ ꢤ ꢣꢜ ꢟꢩꢣ ꢟꢣ ꢜ ꢝꢠ ꢛꢚ ꢕꢣꢪ ꢞꢠ ꢔꢙꢠ ꢟꢜ ꢢꢝ ꢣꢙꢟ ꢠ ꢠꢟ ꢞꢙꢧ ꢞꢜ ꢧ ꢫ ꢞꢜ ꢜ ꢞ ꢙꢟꢬꢨ

ꢒꢜ ꢛ ꢧꢢꢡ ꢟ ꢘꢛ ꢙ ꢤꢜ ꢛ ꢡ ꢣ ꢠ ꢠ ꢘꢙ ꢭ ꢧꢛ ꢣ ꢠ ꢙꢛꢟ ꢙꢣ ꢡꢣ ꢠꢠ ꢞꢜ ꢘꢦ ꢬ ꢘꢙꢡ ꢦꢢꢧ ꢣ ꢟꢣ ꢠꢟꢘ ꢙꢭ ꢛꢚ ꢞꢦ ꢦ ꢤꢞ ꢜ ꢞꢝ ꢣꢟꢣ ꢜ ꢠꢨ

12 3 4 5 6 7...24

中文翻译

下载PDF

SN65MLVD080 替代型号

型号	品牌	替代类型	描述	数据表
SN65LVDM1676	TI	功能相似	HIGH SPEED DIFFERENTIAL LINE TRANSCEIVERS

与SN65MLVD080相关器件

型号	品牌	获取价格	描述	数据表
SN65MLVD080_07	TI	获取价格	8-CHANNEL HALF-DUPLEX M-LVDS LINE TRANSCEIVERS
SN65MLVD080DGG	TI	获取价格	8 CHANNEL HALF DUPLEX M LVDS LINE TRANSCEIVERS
SN65MLVD080DGGG4	TI	获取价格	8-CHANNEL HALF-DUPLEX M-LVDS LINE TRANSCEIVERS
SN65MLVD080DGGR	TI	获取价格	8-CHANNEL HALF-DUPLEX M-LVDS LINE TRANSCEIVERS
SN65MLVD080DGGRG4	TI	获取价格	8-CHANNEL HALF-DUPLEX M-LVDS LINE TRANSCEIVERS
SN65MLVD082	TI	获取价格	8 CHANNEL HALF DUPLEX M LVDS LINE TRANSCEIVERS
SN65MLVD082DGG	TI	获取价格	8 CHANNEL HALF DUPLEX M LVDS LINE TRANSCEIVERS
SN65MLVD082DGGG4	TI	获取价格	8-CHANNEL HALF-DUPLEX M-LVDS LINE TRANSCEIVERS
SN65MLVD082DGGR	TI	获取价格	8-CHANNEL HALF-DUPLEX M-LVDS LINE TRANSCEIVERS
SN65MLVD082DGGRG4	TI	获取价格	8-CHANNEL HALF-DUPLEX M-LVDS LINE TRANSCEIVERS

与SN65MLVD080相关文章

SL74HC10N：高性能三输入与非门解析
2024-09-03

78
AIC1781A 电池充电控制器深度解析
2024-09-03

69
Pickering新高压舌簧继电器亮相汽车测试博览会
2024-08-26

100
采用MCU+MPU双处理器架构实现的创新应用设计探索
2024-08-23

114

产品中心

服务支持

精选活动

关于我们

帮助中心

SN65MLVD080

SN65MLVD080 数据手册

SN65MLVD080 替代型号

与SN65MLVD080相关器件

与SN65MLVD080相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

SN65MLVD080

SN65MLVD080 数据手册

SN65MLVD080 替代型号

与SN65MLVD080相关器件

与SN65MLVD080相关文章

您还可以找

您在本页遇到什么问题？