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SN65LVDT348DRG4 PDF预览

SN65LVDT348DRG4

更新时间: 2024-11-25 15:51:59
品牌 Logo 应用领域
德州仪器 - TI 信息通信管理光电二极管接口集成电路
页数 文件大小 规格书
25页 674K
描述
QUAD LINE RECEIVER, PDSO16, GREEN, PLASTIC, MS-012AC, SOIC-16

SN65LVDT348DRG4 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP, SOP16,.25针数:16
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.58
Is Samacsys:N差分输出:NO
输入特性:DIFFERENTIAL SCHMITT TRIGGER接口集成电路类型:LINE RECEIVER
接口标准:EIA-644-A; TIA-644-AJESD-30 代码:R-PDSO-G16
JESD-609代码:e4长度:9.9 mm
湿度敏感等级:1功能数量:4
端子数量:16最高工作温度:85 °C
最低工作温度:-40 °C最大输出低电流:0.004 A
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP16,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
电源:3.3 V认证状态:Not Qualified
最大接收延迟:6 ns接收器位数:4
座面最大高度:1.75 mm子类别:Line Driver or Receivers
最大压摆率:20 mA最大供电电压:3.6 V
最小供电电压:3 V标称供电电压:3.3 V
表面贴装:YES技术:BICMOS
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3.9 mmBase Number Matches:1

SN65LVDT348DRG4 数据手册

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SN65LVDS348 , SN65LVDT348  
SN65LVDS352, SN65LVDT352  
www.ti.com  
SLLS523EFEBRUARY 2002REVISED MAY 2004  
QUAD HIGH-SPEED DIFFERENTIAL RECEIVERS  
FEATURES  
DESCRIPTION  
Meets or Exceeds the Requirements of ANSI  
TIA/EIA-644A Standard  
The  
SN65LVDS352, and SN65LVDT352 are high-speed,  
quadruple differential receivers with wide  
common-mode input voltage range. This allows  
receipt of TIA/EIA-644 signals with up to 3-V of  
SN65LVDS348,  
SN65LVDT348,  
a
Single-Channel Signaling Rates up to  
560 Mbps  
-4 V to 5 V Common-Mode Input Voltage  
Range  
ground noise or  
a variety of differential and  
single-ended logic levels. The '348 is in a 16-pin  
package to match the industry-standard footprint of  
the DS90LV048. The '352 adds two additional VCC  
and GND pins in a 24-pin package to provide higher  
data transfer rates with multiple receivers in  
operation. All offer a flow-through architecture with all  
inputs on one side and outputs on the other to ease  
board layout and reduce crosstalk between  
receivers. LVDT versions of both integrate a 110-  
line termination resistor.  
Flow-Through Architecture  
Active Failsafe Assures a High-level Output  
When an Input Signal Is not Present  
SN65LVDS348 Provides a Wide Common-  
Mode Range Replacement for the  
SN65LVDS048A or the DS90LV048A  
APPLICATIONS  
Logic Level Translator  
Point-to-Point Baseband Data Transmission  
Over 100-Media  
ECL/PECL-to-LVTTL Conversion  
Wireless Base Stations  
These receivers also provide 3x the standard's  
minimum common-mode noise voltage tolerance.  
The -4 V to 5 V common-mode range allows usage  
in harsh operating environments or accepts LVPECL,  
PECL, LVECL, ECL, CMOS, and LVCMOS levels  
without level shifting circuitry. See the Application  
Information Section for more details on the  
ECL/PECL to LVDS interface.  
Central Office or PABX Switches  
DATA TRANSFER RATE  
vs  
FREE-AIR TEMPERATURE  
550  
Timer  
SN65LVDS352PW  
500  
LVDT Device  
Only  
450  
400  
SN65LVDS348PW  
350  
(One of Four Shown)  
300  
15  
2
-1 prbs NRZ, V = 0.4 V  
ID  
= 1.2 V, C = 5.5 pF, 40% Open Eye  
L
250  
200  
V
IC  
4 Receivers Switching, Input Jitter < 45 ps  
-60  
-40  
-20  
0
20  
40  
60  
80  
100  
T - Free-Air Temperature - °C  
A
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2002–2004, Texas Instruments Incorporated  

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