5秒后页面跳转
捷配首页

Datasheet > 驱动程序和接口 > 线路驱动器或接收器> SN65LVDT388DBTR
SN65LVDT388DBTR PDF预览

SN65LVDT388DBTR

更新时间： 2024-01-27 17:51:02
品牌 Logo 应用领域
德州仪器 - TI 线路驱动器或接收器驱动程序和接口接口集成电路光电二极管
页数 文件大小 规格书
14页 204K
描述
HIGH-SPEED DIFFERENTIAL LINE RECEIVERS

阅读下载

中文翻译

获取价格

SN65LVDT388DBTR 技术参数

是否无铅：不含铅是否Rohs认证：符合
生命周期：Not Recommended零件包装代码：TSSOP
包装说明：TSSOP-38针数：38
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01Factory Lead Time：1 week
风险等级：5.17Is Samacsys：N
差分输出：NO驱动器位数：8
高电平输入电流最大值：0.00001 A输入特性：DIFFERENTIAL
接口集成电路类型：LINE RECEIVER接口标准：EIA-644; TIA-644
JESD-30 代码：R-PDSO-G38JESD-609代码：e4
长度：9.7 mm湿度敏感等级：2
功能数量：8端子数量：38
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：TOTEM-POLE最大输出低电流：0.008 A
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装等效代码：TSSOP38,.25,20
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：260电源：3.3 V
认证状态：Not Qualified最大接收延迟：4 ns
接收器位数：8座面最大高度：1.2 mm
子类别：Line Driver or Receivers最大压摆率：70 mA
最大供电电压：3.6 V最小供电电压：3 V
标称供电电压：3.3 V电源电压1-最大：3.6 V
电源电压1-分钟：3 V电源电压1-Nom：3.3 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：GULL WING端子节距：0.5 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：4.4 mmBase Number Matches：1

SN65LVDT388DBTR 数据手册

 浏览型号SN65LVDT388DBTR的Datasheet PDF文件第2页浏览型号SN65LVDT388DBTR的Datasheet PDF文件第3页浏览型号SN65LVDT388DBTR的Datasheet PDF文件第4页浏览型号SN65LVDT388DBTR的Datasheet PDF文件第5页浏览型号SN65LVDT388DBTR的Datasheet PDF文件第6页浏览型号SN65LVDT388DBTR的Datasheet PDF文件第7页 
SN65LVDS388, SN65LVDT388, SN75LVDS388, SN75LVDT388  
HIGH-SPEED DIFFERENTIAL LINE RECEIVERS  
SLLS448A – SEPTEMBER 2000 – REVISED MAY 2001  
Eight Line Receivers Meet or Exceed the  
Requirements of ANSI TIA/EIA-644  
Standard  
NOT RECOMMENDED FOR NEW DESIGNS  
For Replacement Use ’LVDx388A  
Integrated 110-Ω Line Termination  
Resistors on LVDT Products  
’LVDS388, ’LVDT388  
DBT PACKAGE  
(TOP VIEW)  
†
Designed for Signaling Rates Up To  
630 Mbps  
1
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
A1A  
A1B  
A2A  
A2B  
NC  
B1A  
B1B  
B2A  
B2B  
NC  
C1A  
C1B  
C2A  
C2B  
NC  
D1A  
D1B  
D2A  
D2B  
GND  
SN65 Version’s Bus-Terminal ESD Exceeds  
15 kV  
2
V
CC  
3
ENA  
A1Y  
A2Y  
ENB  
B1Y  
B2Y  
GND  
Operates From a Single 3.3-V Supply  
Propagation Delay Time of 2.6 ns (Typ)  
4
5
6
Output Skew 100 ps (Typ)  
Part-To-Part Skew Is Less Than 1 ns  
7
8
LVTTL Levels Are 5-V Tolerant  
Open-Circuit Fail Safe  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
V
CC  
Flow-Through Pin Out  
GND  
C1Y  
C2Y  
ENC  
D1Y  
D2Y  
END  
Packaged in Thin Shrink Small-Outline  
Package With 20-mil Terminal Pitch  
description  
The ‘LVDS388 and ‘LVDT388 (T designates  
integrated termination) are eight differential line  
receivers that implement the electrical character-  
istics of low-voltage differential signaling (LVDS).  
Thissignalingtechniquelowerstheoutputvoltage  
levels of 5-V differential standard levels (such as  
EIA/TIA-422B) to reduce the power, increase the  
switching speeds, and allow operation with a 3-V  
supply rail. Any of the eight differential receivers  
will provide a valid logical output state with a  
+100-mV differential input voltage within the input  
common-mode voltage range. The input  
common-mode voltage range allows 1 V of  
ground potential difference between two LVDS  
nodes. Additionally, the high-speed switching of  
LVDS signals always require the use of a line  
impedance matching resistor at the receiving end  
of the cable or transmission media. The LVDT  
product eliminates this external resistor by  
integrating it with the receiver.  
V
CC  
GND  
logic diagram (positive logic)  
’LVDx388  
’LVDT388 ONLY  
1A  
1Y  
1B  
EN  
2A  
2Y  
2B  
(1/4 of ’LVDx388 shown)  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
†
Signaling rate, 1/t, where t is the minimum unit interval and is expressed in the units bits/s (bits per second)  
Copyright 2001, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...14

中文翻译

下载PDF

SN65LVDT388DBTR 替代型号

型号 品牌 替代类型 描述 数据表
SN65LVDT388ADBTR TI

完全替代

 HIGH-SPEED DIFFERENTIAL LINE RECEIVERS
SN65LVDT388DBT TI

完全替代

 HIGH-SPEED DIFFERENTIAL LINE RECEIVERS

与SN65LVDT388DBTR相关器件

型号 品牌 获取价格 描述 数据表
SN65LVDT388DBTRG4 TI

获取价格

 		OCTAL LINE RECEIVER, PDSO38, 0.50 MM PITCH, GREEN, PLASTIC, TSSOP-38
SN65LVDT390 TI

获取价格

 		HIGH-SPEED DIFFERENTIAL LINE RECEIVERS
SN65LVDT390D TI

获取价格

 		HIGH-SPEED DIFFERENTIAL LINE RECEIVERS
SN65LVDT390DG4 TI

获取价格

 		HIGH-SPEED DIFFERENTIAL LINE RECEIVERS
SN65LVDT390DR TI

获取价格

 		HIGH-SPEED DIFFERENTIAL LINE RECEIVERS
SN65LVDT390DRG4 TI

获取价格

 		HIGH-SPEED DIFFERENTIAL LINE RECEIVERS
SN65LVDT390PW TI

获取价格

 		HIGH-SPEED DIFFERENTIAL LINE RECEIVERS
SN65LVDT390PWG4 TI

获取价格

 		HIGH-SPEED DIFFERENTIAL LINE RECEIVERS
SN65LVDT390PWR TI

获取价格

 		HIGH-SPEED DIFFERENTIAL LINE RECEIVERS
SN65LVDT390PWRG4 TI

获取价格

 		HIGH-SPEED DIFFERENTIAL LINE RECEIVERS

与SN65LVDT388DBTR相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证