5秒后页面跳转
SN65LVDS048A_06 PDF预览

SN65LVDS048A_06

更新时间: 2024-11-25 05:25:03
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
11页 141K
描述
LVDS QUAD DIFFERENTIAL LINE RECEIVER

SN65LVDS048A_06 数据手册

 浏览型号SN65LVDS048A_06的Datasheet PDF文件第2页浏览型号SN65LVDS048A_06的Datasheet PDF文件第3页浏览型号SN65LVDS048A_06的Datasheet PDF文件第4页浏览型号SN65LVDS048A_06的Datasheet PDF文件第5页浏览型号SN65LVDS048A_06的Datasheet PDF文件第6页浏览型号SN65LVDS048A_06的Datasheet PDF文件第7页 
SN65LVDS048A  
www.ti.com  
SLLS451BSEPTEMBER 2000REVISED SEPTEMBER 2002  
LVDS QUAD DIFFERENTIAL LINE RECEIVER  
FEATURES  
SN65LVDS048AD (Marked as LVDS048A)  
SN65LVDS048APW (Marked as DL048A)  
(TOP VIEW)  
>400 Mbps (200 MHz) Signaling Rates  
Flow-Through Pinout Simplifies PCB Layout  
50 ps Channel-to-Channel Skew (Typ)  
200 ps Differential Skew (Typ)  
R
IN1–  
R
IN1+  
R
IN2+  
R
IN2–  
R
IN3–  
R
IN3+  
R
IN4+  
R
IN4–  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
EN  
R
OUT1  
R
V
OUT2  
Propagation Delay Times 2.7 ns (Typ)  
3.3-V Power Supply Design  
CC  
GND  
High Impedance LVDS Inputs on Power Down  
Low-Power Dissipation (40 mW at 3.3 V Static)  
R
OUT3  
R
OUT4  
EN  
Accepts Small Swing (350 mV) Differential  
Signal Levels  
Supports Open, Short, and Terminated Input  
Fail-Safe  
functional diagram  
EN  
EN  
Industrial Operating Temperature Range  
(–40°C to 85°C)  
Conforms to TIA/EIA-644 LVDS Standard  
Available in SOIC and TSSOP Packages  
R
R
IN1+  
R1  
R2  
R3  
R4  
R
OUT1  
IN1–  
Pin-Compatible With DS90LV048A From  
National  
R
R
IN2+  
R
R
OUT2  
IN2–  
R
R
IN3+  
OUT3  
IN3–  
R
R
IN4+  
R
OUT4  
IN4–  
DESCRIPTION  
The SN65LVDS048A is a quad differential line receiver that implements the electrical characteristics of  
low-voltage differential signaling (LVDS). This signaling technique lowers the output voltage levels of 5-V  
differential standard levels (such as EIA/TIA-422B) to reduce the power, increase the switching speeds, and  
allow operation with a 3.3-V supply rail. Any of the quad differential receivers will provide a valid logical output  
state with a ±100-mV differential input voltage within the input common-mode voltage range. The input  
common-mode voltage range allows 1 V of ground potential difference between two LVDS nodes  
The intended application of this device and signaling technique is for point-to-point baseband data transmission  
over controlled impedance media of approximately 100 . The transmission media may be printed-circuit board  
traces, backplanes, or cables. The ultimate rate and distance of data transfer is dependent upon the attenuation  
characteristics of the media, the noise coupling to the environment, and other system characteristics.  
The SN65LVDS048A is characterized for operation from –40°C to 85°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2000–2002, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  

与SN65LVDS048A_06相关器件

型号 品牌 获取价格 描述 数据表
SN65LVDS048AD TI

获取价格

LVDS QUAD DIFFERENTIAL LINE RECEIVER
SN65LVDS048ADG4 TI

获取价格

LVDS QUAD DIFFERENTIAL LINE RECEIVER
SN65LVDS048ADR TI

获取价格

LVDS QUAD DIFFERENTIAL LINE RECEIVER
SN65LVDS048ADRG4 TI

获取价格

LVDS QUAD DIFFERENTIAL LINE RECEIVER
SN65LVDS048APW TI

获取价格

LVDS QUAD DIFFERENTIAL LINE RECEIVER
SN65LVDS048APWG4 TI

获取价格

LVDS QUAD DIFFERENTIAL LINE RECEIVER
SN65LVDS048APWR TI

获取价格

LVDS QUAD DIFFERENTIAL LINE RECEIVER
SN65LVDS048APWRG4 TI

获取价格

LVDS QUAD DIFFERENTIAL LINE RECEIVER
SN65LVDS048D TI

获取价格

LVDS QUAD DIFFERENTIAL LINE RECEIVER
SN65LVDS048DR TI

获取价格

LVDS QUAD DIFFERENTIAL LINE RECEIVER