SN65LVDM320

更新时间： 2024-11-25 09:17:15

品牌	Logo	应用领域
德州仪器 - TI		/
页数	文件大小	规格书
32页	433K
描述
HIGH-SPEED DIFFERENTIAL 8-BIT REGISTERED TRANSCEIVER

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数据手册

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SN65LVDM320 数据手册

SN65LVDM320

SLLS462 – AUGUST 2001

HIGH-SPEED DIFFERENTIAL 8-BIT REGISTERED TRANSCEIVER

Open-Circuit Differential Receiver Fail Safe

Assures a Low-Level Output

FEATURES

8-Bit Bidirectional Data Storage Register With

Full Parallel Access

Reset at Power Up

12-kV Bus-Pin ESD Protection

†

Parallel Transfer Rates

Bus Pins Remain High-Impedance When

– Buffer Mode: Up to 475 Megatransfers

– Flip-Flop Mode: Up to 300 Megatransfers

– Latch Mode: Up to 300 Megatransfers

Disabled or With V

Below 1.5 V for

Power-Up/Down Glitch-Free Performance and

Hot Plugging

Operates With a Single 3.3-V Supply

5-V Tolerant LVCMOS Inputs

Low-Voltage Differential Signaling With

Typical Output Voltage of 350 mV Across a

50-Ω Load

APPLICATIONS

Telecom Switching

Bus and Logic Loopback Capability

Very Low Radiation Emission

Printers and Copiers

Audio Mixing Consoles

Automated Test Equipment

Low Skew Performance

– Pulse Skew Less Than 100 ps

– Output Skew Less Than 320 ps

– Part-to-Part Skew Less Than 1 ns

logic diagram

OEB

OMODE1

OMODE2

LPBK

NODE

CLK/LEAB

IMODE1

IMODE2

CLK/LEBA

OEA

LPBK

ENR

One-of-Eight Channels

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments

semiconductor products and disclaimers thereto appears at the end of this data sheet.

†

Parallel data transfer through all channels simultaneously as defined by TIA/EIA–644 with t of t less than 30%of the unit interval.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

www.ti.com

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