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SN65LVDM051QPWRQ1 PDF预览

SN65LVDM051QPWRQ1

更新时间: 2024-11-21 20:06:07
品牌 Logo 应用领域
德州仪器 - TI 驱动光电二极管接口集成电路驱动器
页数 文件大小 规格书
25页 929K
描述
Automotive Catalog High-Speed Differential Line Drivers and Receivers 16-TSSOP -40 to 125

SN65LVDM051QPWRQ1 技术参数

是否无铅: 含铅生命周期:Obsolete
零件包装代码:TSSOP包装说明:TSSOP, TSSOP16,.25
针数:16Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.7差分输出:YES
驱动器位数:2高电平输入电流最大值:0.00002 A
输入特性:DIFFERENTIAL接口集成电路类型:LINE TRANSCEIVER
接口标准:EIA-644; TIA-644JESD-30 代码:R-PDSO-G16
长度:5 mm功能数量:2
端子数量:16最高工作温度:125 °C
最低工作温度:-40 °C最小输出摆幅:0.247 V
最大输出低电流:0.008 A封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP16,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
电源:3.3 V认证状态:Not Qualified
最大接收延迟:4.5 ns接收器位数:2
筛选级别:AEC-Q100座面最大高度:1.2 mm
子类别:Line Driver or Receivers最大压摆率:27 mA
最大供电电压:3.6 V最小供电电压:3 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL最大传输延迟:3 ns
宽度:4.4 mmBase Number Matches:1

SN65LVDM051QPWRQ1 数据手册

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ꢍꢎ ꢏ ꢍꢉꢀꢐ ꢑꢑꢆ ꢆꢎ ꢒꢒ ꢑꢓ ꢑꢁꢔ ꢎꢕ ꢄ ꢄ ꢎꢁꢑ ꢆꢓꢎ ꢅꢑ ꢓꢀ ꢕꢁꢆ ꢓꢑꢖ ꢑ ꢎꢅ ꢑ ꢓꢀ  
SGLS128A − JULY 2002 − REVISED APRIL 2008  
SN65LVDM050QDQ1 (Marked as LVDM050Q)  
D
D
Qualified for Automotive Applications  
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
(TOP VIEW)  
14  
13  
15  
1Y  
1Z  
1D  
1B  
1A  
V
CC  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
12  
9
1D  
1Y  
1Z  
DE  
2Z  
DE  
2D  
10  
11  
2Y  
2Z  
1R  
D
Low-Voltage Differential 50-Line Drivers  
and Receivers  
RE  
2R  
2
1
D
D
D
D
Signaling Rates up to 500 Mbps  
Bus-Terminal ESD Exceeds 12 kV  
Operates From a Single 3.3 V Supply  
3
1A  
1B  
2A  
1R  
2B  
10 2Y  
2D  
4
5
RE  
2R  
GND  
9
6
7
2A  
2B  
Low-Voltage Differential Signaling With  
Typical Output Voltages of 340 mV With a  
50-Load  
D
D
Valid Output With as Little as 50-mV Input  
Voltage Difference  
SN65LVDM051QDQ1 (Marked as LVDM051Q)  
(TOP VIEW)  
14  
13  
15  
1Y  
1Z  
Propagation Delay Times  
− Driver: 1.7 ns Typ  
− Receiver: 3.7 ns Typ  
1D  
1B  
1A  
V
CC  
1D  
1Y  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
4
3
1DE  
1R  
2
1
1A  
1B  
1R  
D
Power Dissipation at 200 MHz  
− Driver: 50 mW Typical  
− Receiver: 60 mW Typical  
1DE  
2R  
1Z  
2DE  
2Z  
10  
11  
9
2Y  
2Z  
2A  
2D  
D
D
LVTTL Input Levels Are 5 V Tolerant  
2B  
10 2Y  
2D  
12  
5
2DE  
2R  
6
7
GND  
9
Driver Is High Impedance When Disabled or  
2A  
2B  
With V  
< 1.5 V  
CC  
D
Receiver Has Open-Circuit Fail Safe  
description  
The SN65LVDM050, and SN65LVDM051 are differential line drivers and receivers that use low-voltage  
differential signaling (LVDS) to achieve signaling rates as high as 500 Mbps (per TIA/EIA-644 definition). These  
circuits are similar to TIA/EIA-644 standard compliant devices (SN65LVDS) counterparts, except that the output  
current of the drivers is doubled. This modification provides a minimum differential output voltage magnitude  
of 247 mV across a 50-load simulating two transmission lines in parallel. This allows having data buses with  
more than one driver or with two line termination resistors. The receivers detect a voltage difference of 50 mV  
with up to 1 V of ground potential difference between a transmitter and receiver.  
The intended application of these devices and signaling techniques is point-to-point and multipoint, baseband  
data transmission over a controlled impedance media of approximately 100 of characteristic impedance. The  
transmission media may be printed-circuit board traces, backplanes, or cables.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
ꢔꢤ  
Copyright 2008 Texas Instruments Incorporated  
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1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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