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SN65LVDM176 PDF预览

SN65LVDM176

更新时间： 2024-01-29 00:53:47
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
20页 267K
描述
HIGH-SPEED DIFFERENTIAL LINE TRANSCEIVER

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SN65LVDM176 技术参数

生命周期：Obsolete包装说明：SOP,
Reach Compliance Code：unknownECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.66
差分输出：YES驱动器位数：1
输入特性：DIFFERENTIAL接口集成电路类型：LINE TRANSCEIVER
接口标准：EIA-485JESD-30 代码：R-PDSO-G8
长度：4.9 mm功能数量：1
端子数量：8最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE认证状态：Not Qualified
接收器位数：1座面最大高度：1.75 mm
标称供电电压：3.3 V表面贴装：YES
温度等级：INDUSTRIAL端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
宽度：3.9 mmBase Number Matches：1

SN65LVDM176 数据手册

 浏览型号SN65LVDM176的Datasheet PDF文件第2页浏览型号SN65LVDM176的Datasheet PDF文件第3页浏览型号SN65LVDM176的Datasheet PDF文件第4页浏览型号SN65LVDM176的Datasheet PDF文件第5页浏览型号SN65LVDM176的Datasheet PDF文件第6页浏览型号SN65LVDM176的Datasheet PDF文件第7页 
SN65LVDM176  
HIGH-SPEED DIFFERENTIAL LINE TRANSCEIVER  
SLLS320C – DECEMBER 1998 – REVISED MARCH 2000  
Low-Voltage Differential Driver and  
Receiver for Half-Duplex Operation  
SN65LVDM176D (Marked as DM176 or LVM176)  
SN65LVDM176DGK (Marked as M76)  
(TOP VIEW)  
Designed for Signaling Rates of 400 Mbit/s  
ESD Protection Exceeds 15 kV on Bus Pins  
Operates from a Single 3.3 V Supply  
1
2
3
4
8
7
6
5
R
RE  
DE  
D
V
B
A
CC  
Low–Voltage Differential Signaling with  
Typical Output Voltages of 350 mV and a  
50Ω Load  
GND  
Propagation Delay Times  
– Driver: 1.7 ns Typ  
– Receiver: 3.7 ns Typ  
logic diagram (positive logic)  
Power Dissipation at 200 MHz  
– Driver: 50 mW Typical  
3
DE  
– Receiver: 60 mW Typical  
4
LVTTL Levels are 5 V Tolerant  
D
Bus Pins are High Impedance When  
2
Disabled or With V  
Less Than 1.5 V  
CC  
RE  
6
7
A
B
Open-Circuit Fail-Safe Receiver  
1
R
Surface-Mount Packaging  
– D Package (SOIC)  
– DGK Package (MSOP)  
description  
The SN65LVDM176 is a differential line driver and receiver configured as a transceiver that uses low-voltage  
differential signaling (LVDS) to achieve signaling rates as high as 400 Mbit/s. These circuits are similar to  
TIA/EIA-644 standard compliant devices (SN65LVDS) counterparts except that the output current of the drivers  
is doubled. This modification provides a minimum differential output voltage magnitude of 247 mV into a 50Ω  
load and allows double-terminated lines and half-duplex operation. The receivers detect a voltage difference  
of less than 100 mV with up to 1 V of ground potential difference between a transmitter and receiver.  
The intended application of this device and signaling technique is for half-duplex or multiplex baseband data  
transmission over controlled impedance media of approximately 100-Ω characteristic impedance. The  
transmission media may be printed-circuit board traces, backplanes, or cables. (Note: The ultimate rate and  
distance of data transfer is dependent upon the attenuation characteristics of the media, the noise coupling to  
the environment, and other application specific characteristics).  
The SN65LVDM176 is characterized for operation from –40°C to 85°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PowerPAD is a trademark of Texas Instruments Incorporated.  
Copyright 2000, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...20

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