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SN65LBC170_08 PDF预览

SN65LBC170_08

更新时间: 2024-11-09 04:31:19
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TRIPLE DIFFERENTIAL TRANSCEIVERS

SN65LBC170_08 数据手册

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ꢀꢁ ꢂꢃ ꢄ ꢅꢆꢇ ꢈ ꢉ ꢊ ꢀꢁ ꢈꢃ ꢄꢅ ꢆꢇ ꢈꢉ  
ꢋ ꢌꢍꢎ ꢄꢏ ꢐꢍ ꢑꢑ ꢏꢌ ꢏꢁꢋ ꢍꢒ ꢄ ꢋ ꢌꢒꢁꢀ ꢆꢏ ꢍ ꢓꢏ ꢌ ꢀ  
SLLS459C − NOVEMBER 2000 − REVISED MARCH 2005  
SN65LBC170DB (marked as BL170)  
SN75LBC170DB (marked as BL170)  
D
D
D
D
Three Differential Transceivers in One  
Package  
(TOP VIEW)  
Signaling Rates Up to 30 Mbps  
Low Power and High Speed  
1D  
1DIR  
NC  
1B  
1A  
NC  
V
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
Designed for TIA/EIA-485, TIA/EIA-422, ISO  
8482, and ANSI X3.277 (HVD SCSI Fast−20)  
Applications  
GND  
2D  
CC  
2B  
D
D
Common-Mode Bus Voltage Range  
–7 V to 12 V  
2DIR  
3D  
11 2A  
10 3B  
ESD Protection on Bus Terminals  
Exceeds 12 kV  
3DIR  
9
3A  
D
D
D
D
Driver Output Current up to 60 mA  
Thermal Shutdown Protection  
SN65LBC170DW (marked as 65LBC170)  
SN75LBC170DW (marked as 75LBC170)  
(TOP VIEW)  
Driver Positive and Negative Current  
Limiting  
1D  
1DIR  
NC  
1
2
3
4
5
6
7
8
9
10  
20 1B  
Power-Up, Power-Down Glitch-Free  
Operation  
19  
18  
17  
16  
15  
14  
13  
12  
11  
1A  
NC  
NC  
D
Pin-Compatible With the SN75ALS170  
GND  
NC  
D
Available in Shrink Small-Outline Package  
V
CC  
2D  
2B  
2A  
3B  
3A  
NC  
description  
2DIR  
NC  
The SN65LBC170 and SN75LBC170 are  
3D  
monolithic integrated circuits designed for  
bidirectional data communication on multipoint  
bus-transmission lines. Potential applications  
include serial or parallel data transmission, cabled  
peripheral buses with twin axial, ribbon, or  
twisted-pair cabling. These devices are suitable  
for FAST-20 SCSI and can transmit or receive  
data pulses as short as 25 ns, with skew less  
than 3 ns.  
3DIR  
NC − No internal connection  
logic diagram  
1DIR  
1A  
1B  
1D  
These devices combine three 3-state differential  
line drivers and three differential input line  
receivers, all of which operate from a single 5-V  
power supply.  
2DIR  
2A  
2B  
The driver differential outputs and the receiver  
differential inputs are connected internally to form  
three differential input/output (I/O) bus ports that  
are designed to offer minimum loading to the bus  
2D  
3DIR  
3A  
3B  
whenever the driver is disabled or V  
= 0. These  
CC  
ports feature a wide common-mode voltage range  
making the device suitable for party-line  
applications over long cable runs.  
3D  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
The signaling rate of a line is the number of voltage transitions that are made per second expressed in the units bps (bits per second).  
ꢋꢡ  
Copyright 2002, Texas Instruments Incorporated  
ꢝ ꢡ ꢞ ꢝꢖ ꢗꢫ ꢙꢘ ꢜ ꢤꢤ ꢢꢜ ꢚ ꢜ ꢛ ꢡ ꢝ ꢡ ꢚ ꢞ ꢦ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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