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SN65173N-10 PDF预览

SN65173N-10

更新时间: 2024-11-14 21:14:35
品牌 Logo 应用领域
德州仪器 - TI 光电二极管接口集成电路
页数 文件大小 规格书
21页 834K
描述
LINE RECEIVER, PDIP16

SN65173N-10 技术参数

生命周期:Obsolete包装说明:DIP,
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.82
输入特性:DIFFERENTIAL SCHMITT TRIGGER接口集成电路类型:LINE RECEIVER
接口标准:V.10; V.11; X.26; X.27; EIA-422-A; EIA-423-A; EIA-485JESD-30 代码:R-PDIP-T16
长度:19.305 mm功能数量:1
端子数量:16最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装形状:RECTANGULAR
封装形式:IN-LINE认证状态:Not Qualified
最大接收延迟:35 ns接收器位数:4
座面最大高度:5.08 mm最大供电电压:5.25 V
最小供电电压:4.75 V标称供电电压:5 V
表面贴装:NO技术:BIPOLAR
温度等级:INDUSTRIAL端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
宽度:7.62 mmBase Number Matches:1

SN65173N-10 数据手册

 浏览型号SN65173N-10的Datasheet PDF文件第2页浏览型号SN65173N-10的Datasheet PDF文件第3页浏览型号SN65173N-10的Datasheet PDF文件第4页浏览型号SN65173N-10的Datasheet PDF文件第5页浏览型号SN65173N-10的Datasheet PDF文件第6页浏览型号SN65173N-10的Datasheet PDF文件第7页 
SN55173, SN65173, SN75173  
QUADRUPLE DIFFERENTIAL LINE RECEIVERS  
SLLS144E – OCTOBER 1980 – REVISED APRIL 2000  
SN55173 . . . J PACKAGE  
SN65173, SN75173 . . . D OR N PACKAGE  
(TOP VIEW)  
Meet or Exceed the Requirements of  
TIA/EIA-422-B, TIA/EIA-423-B, and  
TIA/EIA-485-A and ITU Recommendations  
V.10, V.11, X.26, and X.27  
1B  
1A  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
V
CC  
Designed for Multipoint Bus Transmission  
on Long Bus Lines in Noisy Environments  
4B  
4A  
4Y  
G
1Y  
3-State Outputs  
G
2Y  
Common-Mode Input Voltage Range of  
12 V to 12 V  
2A  
3Y  
3A  
3B  
2B  
Input Sensitivity . . . ±200 mV  
Input Hysteresis . . . 50 mV Typ  
High Input Impedance . . . 12 kMin  
Operate From Single 5-V Supply  
Low Power Requirements  
GND  
SN55173 . . . FK PACKAGE  
(TOP VIEW)  
Pin-to-Pin Replacement for AM26LS32  
description  
3
2
1
20 19  
18  
4A  
4Y  
NC  
G
1Y  
G
4
5
6
7
8
17  
16  
15  
14  
The SN55173, SN65173, and SN75173 are  
monolithic quadruple differential line receivers  
with 3-state outputs. They are designed to meet  
NC  
2Y  
2A  
3Y  
the  
requirements  
of  
TIA/EIA-422-B,  
9 10 11 12 13  
TIA/EIA-423-B, TIA/EIA-485-A, and several ITU  
recommendations. The standards are for  
balanced multipoint bus transmission at rates up  
to 10 megabits per second. The four receivers  
share two OR enable inputs, one active when  
high, the other active when low. These devices  
feature high input impedance, input hysteresis for  
increased noise immunity, and input sensitivity of  
±200 mV over a common-mode input voltage  
range of 12 V to 12 V. Fail-safe design specifies  
thatiftheinputsareopencircuited, theoutputsare  
always high. The SN65173 and SN75173 are  
designed for optimum performance when used  
with the SN75172 or SN75174 quad differential  
line drivers.  
NCNo internal connection  
THE SN55173 IS NOT RECOMMENDED  
FOR NEW DESIGNS.  
The SN55173 is characterized over the full military temperature range of 55°C to 125°C. The SN65173 is  
characterized for operation from –40°C to 85°C. The SN75173 is characterized for operation from 0°C to 70°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2000, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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