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SN54HCT240W PDF预览

SN54HCT240W

更新时间： 2024-09-27 23:03:03
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器逻辑集成电路输出元件
页数 文件大小 规格书
6页 87K
描述
OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS

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SN54HCT240W 技术参数

生命周期：Obsolete零件包装代码：DFP
包装说明：CERAMIC, FP-20针数：20
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.63Is Samacsys：N
系列：HCTJESD-30 代码：R-GDFP-F20
长度：13.09 mm负载电容（CL）：150 pF
逻辑集成电路类型：BUS DRIVER位数：4
功能数量：2端口数量：2
端子数量：20最高工作温度：125 °C
最低工作温度：-55 °C输出特性：3-STATE
输出极性：INVERTED封装主体材料：CERAMIC, GLASS-SEALED
封装代码：DFP封装形状：RECTANGULAR
封装形式：FLATPACK传播延迟（tpd）：63 ns
认证状态：Not Qualified座面最大高度：2.54 mm
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：4.5 V
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：CMOS温度等级：MILITARY
端子形式：FLAT端子节距：1.27 mm
端子位置：DUAL宽度：6.92 mm
Base Number Matches：1

SN54HCT240W 数据手册

 浏览型号SN54HCT240W的Datasheet PDF文件第2页浏览型号SN54HCT240W的Datasheet PDF文件第3页浏览型号SN54HCT240W的Datasheet PDF文件第4页浏览型号SN54HCT240W的Datasheet PDF文件第5页浏览型号SN54HCT240W的Datasheet PDF文件第6页 
SN54HCT240, SN74HCT240  
OCTAL BUFFERS AND LINE DRIVERS  
WITH 3-STATE OUTPUTS  
SCLS174C – MARCH 1984 – REVISED FEBRUARY 2000  
SN54HCT240 . . . J OR W PACKAGE  
SN74HCT240 . . . DW, N, OR PW PACKAGE  
(TOP VIEW)  
Inputs Are TTL-Voltage Compatible  
3-State Outputs Drive Bus Lines or Buffer  
Memory Address Registers  
High-Current Outputs Drive up to 15 LSTTL  
Loads  
1OE  
1A1  
2Y4  
1A2  
2Y3  
1A3  
2Y2  
1A4  
2Y1  
GND  
V
CC  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
2OE  
1Y1  
2A4  
1Y2  
2A3  
1Y3  
Package Options Include Plastic  
Small-Outline (DW), Thin Shrink  
Small-Outline (PW), and Ceramic Flat (W)  
Packages, Ceramic Chip Carriers (FK), and  
Standard Plastic (N) and Ceramic (J) DIPs  
13 2A2  
12 1Y4  
description  
11  
2A1  
These octal buffers and line drivers are designed  
specifically to improve both the performance and  
density of 3-state memory address drivers, clock  
drivers, and bus-oriented receivers and  
transmitters. The ’HCT240 devices are organized  
as two 4-bit buffers/drivers with separate  
output-enable (OE) inputs. When OE is low, the  
device passes inverted data from the A inputs to  
the Y outputs. When OE is high, the outputs are  
in the high-impedance state.  
SN54HCT240 . . . FK PACKAGE  
(TOP VIEW)  
3
2
1
20 19  
18  
1Y1  
2A4  
1Y2  
2A3  
1Y3  
1A2  
2Y3  
1A3  
2Y2  
1A4  
4
5
6
7
8
17  
16  
15  
14  
The SN54HCT240 is characterized for operation  
over the full military temperature range of –55°C  
to 125°C. The SN74HCT240 is characterized for  
operation from –40°C to 85°C.  
9 10 11 12 13  
FUNCTION TABLE  
(each buffer/driver)  
INPUTS  
OUTPUT  
Y
OE  
A
H
L
L
L
L
H
Z
H
X
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2000, Texas Instruments Incorporated  
On products compliant to MIL-PRF-38535, all parameters are tested  
unless otherwise noted. On all other products, production  
processing does not necessarily include testing of all parameters.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
123456

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SN54HCT244 TI

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SN54HCT244FH TI

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