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SN54AHCT595FK PDF预览

SN54AHCT595FK

更新时间： 2024-11-03 22:25:31
品牌 Logo 应用领域
德州仪器 - TI 移位寄存器触发器逻辑集成电路输出元件
页数 文件大小 规格书
9页 142K
描述
8-BIT SHIFT REGISTERS WITH 3-STATE OUTPUT REGISTERS

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SN54AHCT595FK 技术参数

生命周期：Obsolete零件包装代码：QFN
包装说明：CERAMIC, CC-20针数：20
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.84Is Samacsys：N
其他特性：PARALLEL OUTPUT IS REGISTERED计数方向：RIGHT
系列：AHCT/VHCTJESD-30 代码：S-CQCC-N20
长度：8.89 mm逻辑集成电路类型：SERIAL IN PARALLEL OUT
位数：8功能数量：1
端子数量：20最高工作温度：125 °C
最低工作温度：-55 °C输出特性：3-STATE
输出极性：TRUE封装主体材料：CERAMIC, METAL-SEALED COFIRED
封装代码：QCCN封装形状：SQUARE
封装形式：CHIP CARRIER传播延迟（tpd）：11.4 ns
认证状态：Not Qualified座面最大高度：2.03 mm
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：4.5 V
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：CMOS温度等级：MILITARY
端子形式：NO LEAD端子节距：1.27 mm
端子位置：QUAD触发器类型：POSITIVE EDGE
宽度：8.89 mm最小 fmax：115 MHz
Base Number Matches：1

SN54AHCT595FK 数据手册

 浏览型号SN54AHCT595FK的Datasheet PDF文件第2页浏览型号SN54AHCT595FK的Datasheet PDF文件第3页浏览型号SN54AHCT595FK的Datasheet PDF文件第4页浏览型号SN54AHCT595FK的Datasheet PDF文件第5页浏览型号SN54AHCT595FK的Datasheet PDF文件第6页浏览型号SN54AHCT595FK的Datasheet PDF文件第7页 
SN54AHCT595, SN74AHCT595  
8-BIT SHIFT REGISTERS  
WITH 3-STATE OUTPUT REGISTERS  
SCLS374F – MAY 1997 – REVISED JANUARY 2000  
SN54AHCT595 . . . J OR W PACKAGE  
SN74AHCT595 . . . D, DB, N, OR PW PACKAGE  
(TOP VIEW)  
EPIC (Enhanced-Performance Implanted  
CMOS) Process  
Inputs Are TTL-Voltage Compatible  
8-Bit Serial-In, Parallel-Out Shift  
Shift Register Has Direct Clear  
Q
Q
V
CC  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
B
Q
C
D
A
Q
SER  
OE  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
Q
E
Q
12 RCLK  
F
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
11  
10  
9
Q
SRCLK  
SRCLR  
G
Q
H
GND  
Q
H′  
– 1000-V Charged-Device Model (C101)  
Package Options Include Plastic  
SN54AHCT595 . . . FK PACKAGE  
(TOP VIEW)  
Small-Outline (D), Shrink Small-Outline  
(DB), Thin Shrink Small-Outline (PW), and  
Ceramic Flat (W) Packages, Ceramic Chip  
Carriers (FK), and Standard Plastic (N) and  
Ceramic (J) DIPs  
3
2
1 20 19  
18  
SER  
OE  
Q
4
5
6
7
8
D
Q
17  
16  
E
description  
NC  
NC  
The ’AHCT595 devices contain an 8-bit serial-in,  
parallel-out shift register that feeds an 8-bit D-type  
storage register. The storage register has parallel  
3-state outputs. Separate clocks are provided for  
the shift and storage registers. The shift register  
has a direct overriding clear (SRCLR) input, serial  
(SER) input, and serial outputs for cascading.  
When the output-enable (OE) input is high, the  
outputs are in the high-impedance state.  
15 RCLK  
14  
9 10 11 12 13  
Q
F
SRCLK  
Q
G
NC – No internal connection  
Both the shift register clock (RCLK) and storage register clock (SRCLK) are positive-edge triggered. If both  
clocks are connected together, the shift register always is one clock pulse ahead of the storage register.  
The SN54AHCT595 is characterized for operation over the full military temperature range of –55°C to 125°C.  
The SN74AHCT595 is characterized for operation from –40°C to 85°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC is a trademark of Texas Instruments Incorporated.  
Copyright 2000, Texas Instruments Incorporated  
UNLESS OTHERWISE NOTED this document contains PRODUCTION  
DATA information current as of publication date. Products conform to  
specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all  
parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...9

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