SMJ416400
4194304 BY 4-BIT
DYNAMIC RANDOM-ACCESS MEMORY
SGMS042E – MARCH 1992 – REVISED MARCH 1996
FNC PACKAGE
(TOP VIEW)
SV PACKAGE
(TOP VIEW)
Organization . . . 4194304 × 4
Single 5-V Power Supply (10% Tolerance)
Performance Ranges:
1
2
3
4
5
6
28
27
26
25
24
23
1
V
V
A9
CAS
DQ3
CC
SS
2
OE
ACCESS ACCESS ACCESS READ
3
DQ1
DQ2
W
DQ4
DQ3
CAS
OE
4
DQ2
TIME
TIME
t
TIME OR WRITE
5
t
t
CYCLE
6
RAC
CAC
AA
V
SS
7
V
(MAX)
70 ns
(MAX)
18 ns
20 ns
25 ns
(MAX)
35 ns
40 ns
45 ns
(MIN)
CC
8
DQ4
W
9
’416400-70
’416400-80
’416400-10
130 ns
150 ns
180 ns
RAS
A11
DQ1
RAS
A10
A1
10
12
14
16
18
20
22
24
80 ns
11
13
15
17
19
21
23
A9
A11
A0
100 ns
Enhanced Page-Mode Operation for Faster
Memory Access
A2
9
20
19
18
17
16
15
A8
A7
A6
A5
A4
A10
A0
A1
A2
A3
A3
V
CC
10
11
12
13
14
V
CAS-Before-RAS (CBR) Refresh
SS
A4
A6
A8
A5
A7
Long Refresh Period
4096 Cycles Refresh in 32 ms
3-State Unlatched Output
Low Power Dissipation
V
V
CC
SS
All Inputs, Outputs, and Clocks are
TTL-Compatible
HKB PACKAGE
(TOP VIEW)
Operating Free-Air Temperature Range
– 55°C to 125°C
1
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
V
SS
CC
description
2
DQ1
DQ2
W
RAS
A11
NC
NC
A10
A0
DQ4
DQ3
CAS
OE
A9
NC
NC
A8
A7
A6
A5
A4
3
The SMJ416400 series is a set of high-speed
16777216-bit dynamic random-access
memories (DRAMs), organized as 4194304
words of four bits each. The series employs
technology for high performance, reliability, and
low power.
4
5
6
7
8
9
These devices feature maximum RAS access
times of 70 ns, 80 ns, and 100 ns. All inputs,
outputs, and clocks are compatible with series 54
TTL. All addresses and data-in lines are latched
on-chip to simplify system design. Data out is
unlatched to allow greater system flexibility.
10
11
12
13
14
A1
A2
A3
V
V
SS
CC
The SMJ416400 is offered in 450-mil 24/28-pin
surface-mount small-outline leadless chip carrier
(FNC suffix), 28-lead flatpack (HKB suffix), and
24-lead ZIP (SV suffix) packages. The packages
are characterized for operation from –55°C to
125°C.
PIN NOMENCLATURE
Address Inputs
Column-Address Strobe
A0–A11
CAS
DQ1–DQ4 Data In/Data Out
NC
OE
RAS
W
No Internal Connection
Output Enable
Row-Address Strobe
Write Enable
5-V Supply
V
CC
V
SS
Ground
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 1996, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443