Datasheet > SLG7NT4129

SLG7NT4129

更新时间： 2024-02-09 05:07:52

品牌	Logo	应用领域
DIALOG		PC
页数	文件大小	规格书
9页	419K
描述
PCIE RTD3

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中文翻译

获取价格

数据手册

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SLG7NT4129 数据手册

SLG7NT4129

PCIE RTD3

General Description

Pin Configuration

Silego SLG7NT4129 is a low power and small form

device. The SoC is housed in a 2.5mm x 2.5mm

TDFN package which is optimal for using with small

devices.

VDD

PWR_CNTRL_GPIO#

PLT_RST#

DEVICE_RESET#

PCIE_WAKE#

DEVICE_WAKE#

RST_CNTRL_GPIO#

WAKE_GPIO

Features

• Low Power Consumption

• Dynamic Supply Voltage

• RoHS Compliant / Halogen-Free

• Pb-Free TDFN-12 Package

GND

Thermal Pad

connected to GND

TDFN-12

TOP VIEW

Output Summary

• 2 Outputs – Open Drain

• 2 Outputs – 3-State

Block Diagram

Silego Technology, Inc.

SLG7NT4129_DS_r101

SLG7NT4129_GP_r004

Rev 1.01

Revised June 11, 2013

12 3 4 5 6 7...9

中文翻译

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