Datasheet > SLG7NT4229VTR

SLG7NT4229VTR

更新时间： 2024-11-26 01:10:43

品牌	Logo	应用领域
DIALOG		/
页数	文件大小	规格书
9页	500K
描述
PWROK GENERATOR AND STARTUP LATCHING CIRCUIT

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中文翻译

获取价格

数据手册

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SLG7NT4229VTR 数据手册

SLG7NT4229

PWROK GENERATOR AND STARTUP

LATCHING CIRCUIT

General Description

Pin Configuration

Silego SLG7NT4229 is a low power and small form

device. The SoC is housed in a 2.5mm x 2.5mm

TDFN package which is optimal for using with small

devices.

VDD

BC_ACOK_DSW

VR_ALW_ENABLE

SMC_SHUTDOWN

V3.3A_DSW_PWRGD

VBAT_MON_DPWROK

BC_ACOK

STARTUP_LATCH_SET

SMC_ONOFF_N

PS_ON_SW_N

GND

Features

• Low Power Consumption

• 3.3V Supply Voltage

• RoHS Compliant / Halogen-Free

• Pb-Free TDFN-12 Package

• MSL Level 1

PCH_DPWROK_R

Thermal Pad

connected to GND

TDFN-12

TOP VIEW

Output Summary

• 2 Outputs – Push Pull

• 2 Outputs – Open Drain

Silego Technology, Inc.

SLG7NT4229_DS_r100

SLG7NT4229_GP_r001

Rev 1.0

Revised October 3, 2013

12 3 4 5 6 7...9

中文翻译

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