SLG55022-200030
TM
GreenFET High Voltage Gate Driver
Pin Description
Pin #
VCC
ON
NC
GND
D
Pin Name
Type
Power
Input
--
Pin Description
Supply Voltage
1
2
3
4
5
6
7
CMOS Logic Level. High True
No Connect.
GND
Input
Input
Output
Ground.
FET Drain Connection
Source Connection
FET Gate Drive
S
G
Output CMOS Open Drain - Power Good, indicates external FET fully on. Pull-up resistor
greater than 300k recommended.
PG
8
Output
Overview
The SLG55022 N-Channel FET Gate Driver is used for controlling a delayed turn on and ramping slew rate of the source voltage
on N-Channel FET switches from a CMOS logic level input. Intended as a supporting control element for switched voltage rails
in energy efficient, advanced power management systems, the SLG55022 also integrates circuits to discharge opened switched
voltage rails. The gate driver is available in a variety of configurations supporting a range of turn-on slew rates from 0.80V/ms
up to 4V/ms which, depending on load supplying source voltages in the range of 1.0V to 20V results in ramp times from 200s
to over 20ms(see Application Section). Delays until the ramp begins are source voltage independent and range from 250s to
5ms. A power good condition is output to indicate that the ramp-up slew of the source voltage is finished. Additionally, an internal
discharge circuit provides a controlled path to remove charge from open power rails. The SLG55022 gate drive is packaged in
an 8 pin DFN package.
When used with external N-Channel FETs, the SLG55022 supports low transient, energy efficient switching of high current loads
at source voltages ranging from 1.0V to 20V.
Ordering Information
Part Number
Type
TDFN-8
SLG55022-200030V
SLG55022-200030VTR
TDFN-8 - Tape and Reel (3k units)
Datasheet
10-Jul-2018
Revision 1.03
Page 2 of 9
© 2018 Dialog Semiconductor
CFR0011-120-01