Datasheet > SLG55022-200030VTR

SLG55022-200030VTR

更新时间： 2024-02-25 05:07:10

品牌	Logo	应用领域
DIALOG		栅
页数	文件大小	规格书
9页	256K
描述
GreenFETTM High Voltage Gate Driver

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SLG55022-200030VTR 数据手册

SLG55022-200030

GreenFET High Voltage Gate Driver

Device Operation

In a typical application, de-asserting ON (low) turns off the external power N-FET. When the FET is turned off, the voltage at the

load is discharged through a resistor (300 Ohms) internal to the SLG55022. When ON is asserted (high), the device will not begin

driving the gate of the external power FET unless the voltage at the drain of the device is at or above 0.8V (e.g. V_D 0.8) to

prevent a ‘shootthrough’ situation to the FET’s source load. Gate voltage is not applied to the gate of the external power N-FET

after DLY_t then the gate source (Vgs) voltage is ramped up to 11.5V above the source voltage V_Sat a slew rate determined by

the internal slew rate control element internal to the SLG55022. Monotonic rise of Vs is maintained even as ID increases dramat-

ically after the load device turn on threshold voltage is reached. After the source voltage has ramped up to its maximum steady

state value, the Open Drain PG (Power Good) signal is asserted. PG may be used as the ON control of a second SLG55022

thereby providing power on sequence control of a number of switched power rails, or used in a ‘wired and’ with other PG signals

to indicate all switched power rails are in a power good condition.

The waveforms shown illustrate the monotonic rise of the source voltage of a FET as gate voltage is controlled to accommodate

for variations in load current as the voltage is applied.

Datasheet

10-Jul-2018

Revision 1.03

Page 4 of 9

CFR0011-120-01

1 2 345 6 7...9

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