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SI2706-A10-GM

更新时间: 2024-11-06 09:26:11
品牌 Logo 应用领域
芯科 - SILICON 音频放大器
页数 文件大小 规格书
46页 608K
描述
EMI MITIGATING 2.1X 5 W CLASS D AUDIO AMPLIFIER

SI2706-A10-GM 数据手册

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Si2704/05/06/07-A10  
EMI MITIGATING 2.1X 5 W CLASS D AUDIO AMPLIFIER  
Features  
Digital input Delta-Sigma PWM  
Patent-pending EMI mitigation  
AM radio band noise-free notch  
GSM/iPhone friendly  
Wideband PWM carrier spreading  
Power stage slew rate control  
Power stage feedback for PSR/THD  
Programmable 7 band parametric EQ,  
dynamic range compressor, tone control  
Crossbar input mixer with scaling  
Digital tone and alert generation  
128 dB volume control in 0.5 dB steps  
Multiple low power operating modes  
Over-current and over-temperature  
detection w/ auto recovery  
2x 5 W @ 3  
BTL; 2x 3 W @ 8 BTL  
88% efficiency with >50 dB PSRR  
95 dB dynamic range and <0.1% THD  
Stereo PWM DAC line analog outputs  
Pop and click free operation  
Standard 2-wire control w/ 2 addresses  
System flexibility w/ 3 multi-function pins  
Dual supply voltage: 2.7–3.6 V main  
and 4.0–6.6 V power stage  
Available in 4x4 24-pin Power QFN and  
7x7 48-pin Power eTQFP package  
Both Pb-free/RoHS compliant  
Ordering Information:  
2
See page 37.  
Master/slave I S w/ 3 inputs & 1 output  
Automatic digital audio rate detection  
Standard audio rates from 32–192 kHz  
Audio activity detector w/ auto-standby  
Operates from external XTAL or clock  
Buffered master/regulator clock output  
Pin Assignments  
Si2704/05/06/07  
Applications  
PMP/MP3 docking stations  
Portable consumer audio electronics  
Table top and portable radios  
Active/wireless speakers  
TVs and monitors  
TV sound bars  
24 23  
22  
21  
20  
19  
DCLK  
DIN  
1
2
3
4
5
6
18 OUTPL  
17 OUTNL  
16 GNDL  
15 GNDR  
14 OUTNR  
13 OUTPR  
Description  
VIO  
GND PAD  
(Back Paddle)  
SCLK  
SDIO  
CLKO  
The Si2704/05/06/07 EMI mitigating 2.1 digital audio processing Class D  
amplifier integrates a power stage, PWM DAC, and digital audio processing  
(DAP) for simplified, low cost, power efficient system designs in consumer  
audio electronics. The digital input amplifier features delta-sigma PWM and  
innovative EMI mitigation technology for producing high-quality audio while  
effectively managing PWM switching noise for enhanced EMI compliance and  
AM/FM radio co-existence, while also being GSM/iPhone friendly.  
Top Down View  
24-Pin QFN Package  
7
8
9
10  
11  
12  
Functional Block Diagram  
48 47 46 45 44 43 42 41 40 39 38 37  
1
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
NC  
NC  
Si270x Digital Class-D Amplifier  
LDO  
2
3
VPPL  
OUTPL  
GND  
DFS  
DCLK  
DIN  
VDD  
2.7 – 3.6 V  
Supply  
4
Power  
Stage  
5
VIO  
OUTNL  
GNDL  
GNDR  
OUTNR  
GND  
Clock  
Generation  
6
GND  
SCLK  
SDIO  
CLKO  
NC  
CH 1  
LF  
GND PAD  
(Back Paddle)  
7
PWM  
CLKO  
8
9
DSP  
I2S/AAD  
10  
11  
12  
OUTPR  
VPPR  
NC  
NC  
Mixer  
ASRC  
4.0 – 6.6 V  
Supply  
Top Down View  
48-Pin eTQFP Package  
I2S  
Feedback  
NC  
VPP  
13 14 15 16 17 18 19 20 21 22 23 24  
Tone Gen.  
Cross-over Filter  
Volume Control  
Tone Control  
7-Band EQ  
DRC  
Power  
Stage  
RF  
VIO  
1.62 – 3.6 V  
Supply  
CH 2  
PWM  
MFP  
MFP Control  
Over Current  
Over Temp  
AUXOL/R  
2-Wire Control  
System Control  
PWM DAC  
Rev. 0.6 8/10  
Copyright © 2010 by Silicon Laboratories  
Si2704/05/06/07-A10  
This information applies to a product under development. Its characteristics and specifications are subject to change without notice.  

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