Si2107/08/09/10
SATELLITE RECEIVER FOR DVB-S/DSS
Features
ꢀ Single-chip tuner, demodulator, ꢀ Automatic acquisition and fade
and LNB controller
recovery
ꢀ DVB-S- and DSS-compliant ꢀ Automatic gain control
ꢀ QPSK/BPSK demodulation
ꢀ Integrated step-up dc-dc
ꢀ On-chip blind scan accelerator
(Si2109/10 only)
converter for LNB power supply ꢀ DiSEqC™ 2.2 support
(Si2108/10 only)
ꢀ Power, C/N, and BER estimators
ꢀ I2C bus interface
Pin Assignments
ꢀ Input signal level:
–81 to –18 dBm
Si2107/08/09/10
ꢀ 3.3/1.8 V supply, 3.3 V I/O
ꢀ Symbol rate range:
ꢀ Lead-free/RoHS-compliant
1 to 45 MBaud
package
44 43 42 41 40 39 38 37 36
1
VDD_LNA
REXT
35 XTAL1
Applications
2
3
4
5
6
7
8
9
GND
34 XTAL2
ADDR
33 VDD_XTAL
32 XTOUT
ꢀ
ꢀ
ꢀ
Set-top boxes
Digital video recorders
Digital televisions
ꢀ
ꢀ
Satellite PC-TV
SMATV trans-modulators
(Satellite Master Antenna TV)
VDD_MIX
VDD_BB
VDD_ADC
VSEN/TDET
LNB1/TGEN
ISEN
31 VDD_PLL33
30 INT/RLK/GPO
29 TS_ERR
Top
View
28
TS_VAL
27 TS_SYNC
26 SDA
LNB2/DRC 10
Description
RESET 11
PWM/DCS 12
VDD_DIG18 13
25 SCL
24 TS_DATA[7]
GND
TS_DATA[6]
23
The Si2107/08/09/10 are a family of pin-compatible, complete front-end solutions
for DSS and DVB-S digital satellite reception. The IC family incorporates a tuner,
demodulator, and LNB controller into a single device resulting in significantly
reduced board space and external component count. The device supports symbol
rates of 1 to 45 MBaud over a 950 to 2150 MHz range. A full suite of features
including automatic acquisition, fade recovery, blind scanning, performance
monitoring, and DiSEqC Level 2.2 compliant signaling are supported. The Si2108/
10 further add short circuit protection, overcurrent protection, and a step-up dc-dc
controller to implement a low-cost LNB supply solution. Si2110/09 versions
include a hardware channel scan accelerator for fast “blindscan”. An I2C bus
interface is used to configure and monitor all internal parameters.
14 15 16 17 18 19 20 21 22
Functional Block Diagram
Acquisition Control
AGC
TS_CLK
TS_DATA[7:0]
TS_VAL
RS
Decoder
Viterbi
Decoder
Tuner
Demodulator
RFIP
TS_SYNC
TS_ERR
VSEN/TDET
LNB2/DRL
ISEN/NC
LNB1/TGEN
PWM/DCS
LNB Control
RF Sythesizer
I2C Interface
SCL SDA
INT/RLK/GPO
XOUT
Preliminary Rev. 0.7 3/06
Copyright © 2006 by Silicon Laboratories
Si2107/08/09/10
This information applies to a product under development. Its characteristics and specifications are subject to change without notice.